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| author |   Alexander Duyck <alexander.h.duyck@intel.com> | 2017-10-21 17:51:50 -0700 |
|---|---|---|
| committer |   Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2017-10-31 10:41:10 -0700 |
| commit | aa250f1186319f1e0b9b4a1d99022fe32251b8b6 (patch) | |
| tree | 31611b8514bb648856b6fb49df882051963b55cb /drivers/net/ethernet/intel | |
| parent | i40e: only redistribute MSI-X vectors when needed (diff) | |
| download | linux-dev-aa250f1186319f1e0b9b4a1d99022fe32251b8b6.tar.xz linux-dev-aa250f1186319f1e0b9b4a1d99022fe32251b8b6.zip | |
i40e/i40evf: Revert "i40e/i40evf: bump tail only in multiples of 8"
This reverts commit 11f29003d6376fb123b7c3779dba49bb56fb0815.
I am reverting this as I am fairly certain this can result in a memory leak
when combined with the current page recycling scheme. Specifically we end
up attempting to allocate fewer buffers than we recycled and this results
in us rewinding the next to alloc pointer which leads to leaks when we
overwrite the rx_buffer_info when processing the next frame.
Fixes: 11f29003d637 ("i40e/i40evf: bump tail only in multiples of 8")
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel')
| -rw-r--r-- | drivers/net/ethernet/intel/i40e/i40e_txrx.c | 9 | ||||
| -rw-r--r-- | drivers/net/ethernet/intel/i40evf/i40e_txrx.c | 9 |
2 files changed, 0 insertions, 18 deletions
diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c index c5cd233c8fee..d6d352a6e6ea 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c +++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c @@ -1407,15 +1407,6 @@ bool i40e_alloc_rx_buffers(struct i40e_ring *rx_ring, u16 cleaned_count) union i40e_rx_desc *rx_desc; struct i40e_rx_buffer *bi; - /* Hardware only fetches new descriptors in cache lines of 8, - * essentially ignoring the lower 3 bits of the tail register. We want - * to ensure our tail writes are aligned to avoid unnecessary work. We - * can't simply round down the cleaned count, since we might fail to - * allocate some buffers. What we really want is to ensure that - * next_to_used + cleaned_count produces an aligned value. - */ - cleaned_count -= (ntu + cleaned_count) & 0x7; - /* do nothing if no valid netdev defined */ if (!rx_ring->netdev || !cleaned_count) return false; diff --git a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c index 6806ada11490..fe817e2b6fef 100644 --- a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c +++ b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c @@ -711,15 +711,6 @@ bool i40evf_alloc_rx_buffers(struct i40e_ring *rx_ring, u16 cleaned_count) union i40e_rx_desc *rx_desc; struct i40e_rx_buffer *bi; - /* Hardware only fetches new descriptors in cache lines of 8, - * essentially ignoring the lower 3 bits of the tail register. We want - * to ensure our tail writes are aligned to avoid unnecessary work. We - * can't simply round down the cleaned count, since we might fail to - * allocate some buffers. What we really want is to ensure that - * next_to_used + cleaned_count produces an aligned value. - */ - cleaned_count -= (ntu + cleaned_count) & 0x7; - /* do nothing if no valid netdev defined */ if (!rx_ring->netdev || !cleaned_count) return false; |