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authorHarman Kalra <hkalra@marvell.com>2021-09-28 17:00:58 +0530
committerDavid S. Miller <davem@davemloft.net>2021-09-28 13:50:37 +0100
commite37e08fffc373206ad4e905c05729ea6bbdcb22c (patch)
tree7d1be4eb17f3afc110bdd454a0392f97162eafb5 /drivers/net/ethernet/marvell/octeontx2/af/rvu.h
parentnet/tls: support SM4 CCM algorithm (diff)
downloadlinux-dev-e37e08fffc373206ad4e905c05729ea6bbdcb22c.tar.xz
linux-dev-e37e08fffc373206ad4e905c05729ea6bbdcb22c.zip
octeontx2-af: Reset PTP config in FLR handler
Upon receiving ptp config request from netdev interface , Octeontx2 MAC block CGX is configured to append timestamp to every incoming packet and NPC config is updated with DMAC offset change. Currently this configuration is not reset in FLR handler. This patch resets the same. Signed-off-by: Harman Kalra <hkalra@marvell.com> Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/marvell/octeontx2/af/rvu.h')
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/rvu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 0128211806f9..95e807626a3e 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -220,6 +220,7 @@ struct rvu_pfvf {
u16 maxlen;
u16 minlen;
+ bool hw_rx_tstamp_en; /* Is rx_tstamp enabled */
u8 mac_addr[ETH_ALEN]; /* MAC address of this PF/VF */
u8 default_mac[ETH_ALEN]; /* MAC address from FWdata */