diff options
| author |   Hariprasad Kelam <hkelam@marvell.com> | 2022-09-10 13:24:14 +0530 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2022-09-17 20:13:41 +0100 |
| commit | 2958d17a898416c6193431676f6130b68a2cb9fc (patch) | |
| tree | 95fcf3ccdc68f94f08e18aefdd4ea4b76a271ba6 /drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c | |
| parent | octeontx2-af: return correct ptp timestamp for CN10K silicon (diff) | |
| download | linux-dev-2958d17a898416c6193431676f6130b68a2cb9fc.tar.xz linux-dev-2958d17a898416c6193431676f6130b68a2cb9fc.zip | |
octeontx2-pf: Add support for ptp 1-step mode on CN10K silicon
Add support for ptp 1-step mode using timecounter. The seconds and
nanoseconds to be updated in PTP header are calculated by adding the
timecounter offset to the free running PTP clock counter time. The PF
driver periodically gets the PTP clock time using AF mbox. The 1-step
support uses HW feature to update correction field rather than
OriginTimestamp field in PTP header.
Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com>
Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c')
| -rw-r--r-- | drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c index 49a4ff01cecb..8bf5274cd7e3 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c @@ -2038,8 +2038,19 @@ int otx2_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr) switch (config.tx_type) { case HWTSTAMP_TX_OFF: + if (pfvf->flags & OTX2_FLAG_PTP_ONESTEP_SYNC) + pfvf->flags &= ~OTX2_FLAG_PTP_ONESTEP_SYNC; + + cancel_delayed_work(&pfvf->ptp->synctstamp_work); otx2_config_hw_tx_tstamp(pfvf, false); break; + case HWTSTAMP_TX_ONESTEP_SYNC: + if (!test_bit(CN10K_PTP_ONESTEP, &pfvf->hw.cap_flag)) + return -ERANGE; + pfvf->flags |= OTX2_FLAG_PTP_ONESTEP_SYNC; + schedule_delayed_work(&pfvf->ptp->synctstamp_work, + msecs_to_jiffies(500)); + fallthrough; case HWTSTAMP_TX_ON: otx2_config_hw_tx_tstamp(pfvf, true); break; |