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authorHuy Nguyen <huyn@mellanox.com>2017-07-18 16:34:51 -0500
committerSaeed Mahameed <saeedm@mellanox.com>2017-11-04 21:26:42 -0700
commitfbcb127e89ba8a4ccbec609a27f8d110474044c8 (patch)
tree2c778a2fd92a9caac04a9d0927b3f65bb62ff2fb /drivers/net/ethernet/mellanox/mlx5/core/en_common.c
parentnet/mlx5e: Add dcbnl dscp to priority support (diff)
downloadlinux-dev-fbcb127e89ba8a4ccbec609a27f8d110474044c8.tar.xz
linux-dev-fbcb127e89ba8a4ccbec609a27f8d110474044c8.zip
net/mlx5e: Support DSCP trust state to Ethernet's IP packet on SQ
If the port is in DSCP trust state, packets are placed in the right priority queue based on the dscp value. This is done by selecting the transmit queue based on the dscp of the skb. Until now select_queue honors priority only from the vlan header. However that is not sufficient in cases where port trust state is DSCP mode as packet might not even contain vlan header. Therefore if the port is in dscp trust state and vport's min inline mode is not NONE, copy the IP header to the eseg's inline header if the skb has it. This is done by changing the transmit queue sq's min inline mode to L3. Note that the min inline mode of sqs that belong to other features such as xdpsq, icosq are not modified. Signed-off-by: Huy Nguyen <huyn@mellanox.com> Reviewed-by: Parav Pandit <parav@mellanox.com> Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en_common.c')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/en_common.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_common.c b/drivers/net/ethernet/mellanox/mlx5/core/en_common.c
index 157d02917237..784e282803db 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_common.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_common.c
@@ -171,3 +171,15 @@ out:
return err;
}
+
+u8 mlx5e_params_calculate_tx_min_inline(struct mlx5_core_dev *mdev)
+{
+ u8 min_inline_mode;
+
+ mlx5_query_min_inline(mdev, &min_inline_mode);
+ if (min_inline_mode == MLX5_INLINE_MODE_NONE &&
+ !MLX5_CAP_ETH(mdev, wqe_vlan_insert))
+ min_inline_mode = MLX5_INLINE_MODE_L2;
+
+ return min_inline_mode;
+}