diff options
| author |   Achiad Shochat <achiad@mellanox.com> | 2015-08-16 16:04:49 +0300 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2015-08-17 15:51:35 -0700 |
| commit | d9a40271cfe625950dc4ef0cbd8429c0d28e62d1 (patch) | |
| tree | 8a21278da1193082348481128748df2b94940c68 /drivers/net/ethernet/mellanox/mlx5/core/en_main.c | |
| parent | net/mlx5e: Support smaller RX/TX ring sizes (diff) | |
| download | linux-dev-d9a40271cfe625950dc4ef0cbd8429c0d28e62d1.tar.xz linux-dev-d9a40271cfe625950dc4ef0cbd8429c0d28e62d1.zip | |
net/mlx5e: HW LRO changes/fixes
- Change the maximum LRO session size from 16KB to 64KB
- Reduce the LRO session timeout from 512us to 32us in
order to reduce the TCP latency of non-LRO'ed flows.
- Fix skb_shinfo(skb)->gso_size and set skb_shinfo(skb)->gso_type.
- Fix a bug accessing un-initialized mdev pointer.
Signed-off-by: Achiad Shochat <achiad@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en_main.c')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index 2b48ff0b1e44..f50a119776de 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -1300,7 +1300,7 @@ static void mlx5e_build_tir_ctx_lro(void *tirc, struct mlx5e_priv *priv) ROUGH_MAX_L2_L3_HDR_SZ) >> 8); MLX5_SET(tirc, tirc, lro_timeout_period_usecs, MLX5_CAP_ETH(priv->mdev, - lro_timer_supported_periods[3])); + lro_timer_supported_periods[2])); } static int mlx5e_modify_tir_lro(struct mlx5e_priv *priv, int tt) @@ -1940,7 +1940,6 @@ static void mlx5e_build_netdev_priv(struct mlx5_core_dev *mdev, for (i = 0; i < MLX5E_INDIR_RQT_SIZE; i++) priv->params.indirection_rqt[i] = i % num_channels; - priv->params.lro_en = false && !!MLX5_CAP_ETH(priv->mdev, lro_cap); priv->params.lro_wqe_sz = MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ; |