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| author |   Vlad Buslov <vladbu@nvidia.com> | 2021-03-18 21:05:20 +0200 |
|---|---|---|
| committer |   Saeed Mahameed <saeedm@nvidia.com> | 2021-06-09 18:36:12 -0700 |
| commit | cc2987c44be5d188b0fdf5c07b65a5c952457ef9 (patch) | |
| tree | abb42698df699986c0eae93083fb50be12c3bb25 /drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.h | |
| parent | net/mlx5: Bridge, support pvid and untagged vlan configurations (diff) | |
| download | linux-dev-cc2987c44be5d188b0fdf5c07b65a5c952457ef9.tar.xz linux-dev-cc2987c44be5d188b0fdf5c07b65a5c952457ef9.zip | |
net/mlx5: Bridge, filter tagged packets that didn't match tagged fg
With support for pvid vlans in mlx5 bridge it is possible to have rules in
untagged flow group when vlan filtering is enabled. However, such rules can
also match tagged packets that didn't match anything in tagged flow group.
Filter such packets by introducing additional flow group between tagged and
untagged groups. When filtering is enabled on the bridge create additional
flow in vlan filtering flow group and matches tagged packets with specified
source MAC address and redirects them to new "skip" table. The skip table
is new lowest-level empty table that is used to skip all further processing
on packet in bridge priority.
Signed-off-by: Vlad Buslov <vladbu@nvidia.com>
Reviewed-by: Jianbo Liu <jianbol@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.h b/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.h index bedbda57cdb3..d826942b27fc 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.h @@ -23,7 +23,10 @@ struct mlx5_esw_bridge_offloads { struct mlx5_flow_table *ingress_ft; struct mlx5_flow_group *ingress_vlan_fg; + struct mlx5_flow_group *ingress_filter_fg; struct mlx5_flow_group *ingress_mac_fg; + + struct mlx5_flow_table *skip_ft; }; struct mlx5_esw_bridge_offloads *mlx5_esw_bridge_init(struct mlx5_eswitch *esw); |