diff options
| author |   Tal Gilboa <talgi@nvidia.com> | 2021-07-18 14:54:13 +0300 |
|---|---|---|
| committer |   Leon Romanovsky <leonro@nvidia.com> | 2021-07-25 11:39:04 +0300 |
| commit | 616d5769345528b989294a242a5906b157a92837 (patch) | |
| tree | 9d3dc1d15454f3a04e8f0ff95779b59a47700bbd /drivers/net/ethernet/mellanox/mlx5/core/fpga | |
| parent | net/mlx5: Add DCS caps & fields support (diff) | |
| download | linux-dev-616d5769345528b989294a242a5906b157a92837.tar.xz linux-dev-616d5769345528b989294a242a5906b157a92837.zip | |
IB/mlx5: Rename is_apu_thread_cq function to is_apu_cq
is_apu_thread_cq() used to detect CQs which are attached to APU
threads. This was extended to support other elements as well,
so the function was renamed to is_apu_cq().
c_eqn_or_apu_element was extended from 8 bits to 32 bits, which wan't
reflected when the APU support was first introduced.
Acked-by: Michael S. Tsirkin <mst@redhat.com> # vdpa
Signed-off-by: Tal Gilboa <talgi@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/fpga')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c b/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c index bd66ab2af5b5..9b2cca6d9620 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c @@ -454,7 +454,7 @@ static int mlx5_fpga_conn_create_cq(struct mlx5_fpga_conn *conn, int cq_size) cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context); MLX5_SET(cqc, cqc, log_cq_size, ilog2(cq_size)); - MLX5_SET(cqc, cqc, c_eqn, eqn); + MLX5_SET(cqc, cqc, c_eqn_or_apu_element, eqn); MLX5_SET(cqc, cqc, uar_page, fdev->conn_res.uar->index); MLX5_SET(cqc, cqc, log_page_size, conn->cq.wq_ctrl.buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); |