diff options
| author |   Ido Schimmel <idosch@mellanox.com> | 2019-04-18 07:14:14 +0000 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2019-04-18 10:37:30 -0700 |
| commit | 1ab3030193d25878b3b1409060e1e0a879800c95 (patch) | |
| tree | 2c578c033a5d1fa92709c1ae6bf874baf2f61fa7 /drivers/net/ethernet/mellanox/mlxsw/pci_hw.h | |
| parent | mlxsw: spectrum: Put MC TCs into DWRR mode (diff) | |
| download | linux-dev-1ab3030193d25878b3b1409060e1e0a879800c95.tar.xz linux-dev-1ab3030193d25878b3b1409060e1e0a879800c95.zip | |
mlxsw: pci: Reincrease PCI reset timeout
During driver initialization the driver sends a reset to the device and
waits for the firmware to signal that it is ready to continue.
Commit d2f372ba0914 ("mlxsw: pci: Increase PCI SW reset timeout")
increased the timeout to 13 seconds due to longer PHY calibration in
Spectrum-2 compared to Spectrum-1.
Recently it became apparent that this timeout is too short and therefore
this patch increases it again to a safer limit that will be reduced in
the future.
Fixes: c3ab435466d5 ("mlxsw: spectrum: Extend to support Spectrum-2 ASIC")
Fixes: d2f372ba0914 ("mlxsw: pci: Increase PCI SW reset timeout")
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlxsw/pci_hw.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/pci_hw.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h index ffee38e36ce8..8648ca171254 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h +++ b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h @@ -27,7 +27,7 @@ #define MLXSW_PCI_SW_RESET 0xF0010 #define MLXSW_PCI_SW_RESET_RST_BIT BIT(0) -#define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS 13000 +#define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS 20000 #define MLXSW_PCI_SW_RESET_WAIT_MSECS 100 #define MLXSW_PCI_FW_READY 0xA1844 #define MLXSW_PCI_FW_READY_MASK 0xFFFF |