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authorPetr Machata <petrm@mellanox.com>2018-09-20 09:21:33 +0300
committerDavid S. Miller <davem@davemloft.net>2018-09-20 07:46:01 -0700
commit6a23f9a49722c391c5624ad1790997cd6b6b8fef (patch)
treea72181088e0d3a2f45c7d49a4b792327e9136f18 /drivers/net/ethernet/mellanox
parentmlxsw: spectrum_buffers: Configure MC pool (diff)
downloadlinux-dev-6a23f9a49722c391c5624ad1790997cd6b6b8fef.tar.xz
linux-dev-6a23f9a49722c391c5624ad1790997cd6b6b8fef.zip
mlxsw: spectrum_buffers: Tweak SBMM configuration
The SBMM register configures shared buffer allocation and settings for MC packets according to switch priority. The recommended values are no reserved buffer and alpha of 1/4, which corresponds to buf_max of 6. Update mlxsw_sp_sb_mms accordingly. Signed-off-by: Petr Machata <petrm@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox')
-rw-r--r--drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c
index 7b9f79c7c025..12c61e0cc570 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c
@@ -566,21 +566,21 @@ struct mlxsw_sp_sb_mm {
}
static const struct mlxsw_sp_sb_mm mlxsw_sp_sb_mms[] = {
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
- MLXSW_SP_SB_MM(20000, 0xff, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
+ MLXSW_SP_SB_MM(0, 6, 4),
};
#define MLXSW_SP_SB_MMS_LEN ARRAY_SIZE(mlxsw_sp_sb_mms)