diff options
| author |   Jakub Kicinski <jakub.kicinski@netronome.com> | 2017-10-23 11:58:12 -0700 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2017-10-24 17:38:37 +0900 |
| commit | 2df03a50f14ab6d888c212aa332536933ded040a (patch) | |
| tree | 0cfedf7707fe926fa21796e31c4c56db214f36d8 /drivers/net/ethernet/netronome/nfp/nfp_asm.h | |
| parent | nfp: bpf: allow stack accesses via modified stack registers (diff) | |
| download | linux-dev-2df03a50f14ab6d888c212aa332536933ded040a.tar.xz linux-dev-2df03a50f14ab6d888c212aa332536933ded040a.zip | |
nfp: bpf: support accessing the stack beyond 64 bytes
To access beyond 64th byte of the stack we need to set a new
stack pointer register (LMEM is accessed indirectly through
those pointers). Add a function for encoding local CSR access
instruction. Use stack pointer number 3.
Note that stack pointer registers allow us to index into 32
bytes of LMEM (with shift operations i.e. when operands are
restricted). This means if access is crossing 32 byte boundary
we must not use offsetting, we have to set the pointer to the
exact address and move it with post-increments.
We depend on the datapath placing the stack base address in
GPR A22 for our use.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Quentin Monnet <quentin.monnet@netronome.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/netronome/nfp/nfp_asm.h')
| -rw-r--r-- | drivers/net/ethernet/netronome/nfp/nfp_asm.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_asm.h b/drivers/net/ethernet/netronome/nfp/nfp_asm.h index 86e7daee6099..f4d1df3a1925 100644 --- a/drivers/net/ethernet/netronome/nfp/nfp_asm.h +++ b/drivers/net/ethernet/netronome/nfp/nfp_asm.h @@ -257,6 +257,11 @@ enum lcsr_wr_src { #define OP_CARB_BASE 0x0e000000000ULL #define OP_CARB_OR 0x00000010000ULL +#define NFP_CSR_ACT_LM_ADDR0 0x64 +#define NFP_CSR_ACT_LM_ADDR1 0x6c +#define NFP_CSR_ACT_LM_ADDR2 0x94 +#define NFP_CSR_ACT_LM_ADDR3 0x9c + /* Software register representation, independent of operand type */ #define NN_REG_TYPE GENMASK(31, 24) #define NN_REG_LM_IDX GENMASK(23, 22) |