diff options
| author |   Ram Amrani <Ram.Amrani@cavium.com> | 2017-03-14 15:25:58 +0200 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2017-03-14 11:37:04 -0700 |
| commit | f3e48119b97f56fb09310c95d49da122a27003d7 (patch) | |
| tree | 6fabfaf2791a275c6a82b14ea4d3937d66c0bc98 /drivers/net/ethernet/qlogic/qed/qed_cxt.c | |
| parent | Merge branch 'mlxsw-small-fixes' (diff) | |
| download | linux-dev-f3e48119b97f56fb09310c95d49da122a27003d7.tar.xz linux-dev-f3e48119b97f56fb09310c95d49da122a27003d7.zip | |
qed: Align CIDs according to DORQ requirement
The Doorbell HW block can be configured at a granularity
of 16 x CIDs, so we need to make sure that the actual number
of CIDs configured would be a multiplication of 16.
Today, when RoCE is enabled - given that the number is unaligned,
doorbelling the higher CIDs would fail to reach the firmware and
would eventually timeout.
Fixes: dbb799c39717 ("qed: Initialize hardware for new protocols")
Signed-off-by: Ram Amrani <Ram.Amrani@cavium.com>
Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/qlogic/qed/qed_cxt.c')
| -rw-r--r-- | drivers/net/ethernet/qlogic/qed/qed_cxt.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/qlogic/qed/qed_cxt.c b/drivers/net/ethernet/qlogic/qed/qed_cxt.c index d42d03df751a..7e3a6fed3da6 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_cxt.c +++ b/drivers/net/ethernet/qlogic/qed/qed_cxt.c @@ -422,8 +422,9 @@ static void qed_cxt_set_proto_cid_count(struct qed_hwfn *p_hwfn, u32 page_sz = p_mgr->clients[ILT_CLI_CDUC].p_size.val; u32 cxt_size = CONN_CXT_SIZE(p_hwfn); u32 elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size; + u32 align = elems_per_page * DQ_RANGE_ALIGN; - p_conn->cid_count = roundup(p_conn->cid_count, elems_per_page); + p_conn->cid_count = roundup(p_conn->cid_count, align); } } |