diff options
| author |   Heiner Kallweit <hkallweit1@gmail.com> | 2020-01-09 20:30:00 +0100 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2020-01-10 16:41:34 -0800 |
| commit | 6d7a631e27ad526ea2e47082d5d84167d0fdc984 (patch) | |
| tree | cf0bfc80974d8823b59614f4bf806805eb992909 /drivers/net/ethernet/realtek | |
| parent | r8169: move setting ERI register 0x1d0 for RTL8106 (diff) | |
| download | linux-dev-6d7a631e27ad526ea2e47082d5d84167d0fdc984.tar.xz linux-dev-6d7a631e27ad526ea2e47082d5d84167d0fdc984.zip | |
r8169: move disabling MAC EEE for RTL8402/RTL8106e
Move configuring EEE on MAC side out of the PHY configuration.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/realtek')
| -rw-r--r-- | drivers/net/ethernet/realtek/r8169_main.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c index d157c971c28e..3fb3f2ac6eab 100644 --- a/drivers/net/ethernet/realtek/r8169_main.c +++ b/drivers/net/ethernet/realtek/r8169_main.c @@ -3400,7 +3400,6 @@ static void rtl8402_hw_phy_config(struct rtl8169_private *tp, rtl_apply_firmware(tp); /* EEE setting */ - rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000); rtl_writephy(tp, 0x1f, 0x0004); rtl_writephy(tp, 0x10, 0x401f); rtl_writephy(tp, 0x19, 0x7030); @@ -3423,7 +3422,6 @@ static void rtl8106e_hw_phy_config(struct rtl8169_private *tp, rtl_apply_firmware(tp); - rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000); rtl_writephy_batch(phydev, phy_reg_init); } @@ -4983,6 +4981,9 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp) rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000); rtl_w0w1_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0e00, 0xff00); + /* disable EEE */ + rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000); + rtl_pcie_state_l2l3_disable(tp); } @@ -4999,6 +5000,9 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp) rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000); + /* disable EEE */ + rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000); + rtl_pcie_state_l2l3_disable(tp); rtl_hw_aspm_clkreq_enable(tp, true); } |