aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
diff options
context:
space:
mode:
authorDavid S. Miller <davem@davemloft.net>2019-12-18 12:14:08 -0800
committerDavid S. Miller <davem@davemloft.net>2019-12-18 12:14:08 -0800
commit6dbb2e91f8bd4ad171f03f09979d2bf8e6a46306 (patch)
tree4f45bbf8306ab58c31a6b8d0ed3b2029fffba25d /drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
parentxen-netback: remove 'hotplug-status' once it has served its purpose (diff)
parentnet: stmmac: Always use TX coalesce timer value when rescheduling (diff)
downloadlinux-dev-6dbb2e91f8bd4ad171f03f09979d2bf8e6a46306.tar.xz
linux-dev-6dbb2e91f8bd4ad171f03f09979d2bf8e6a46306.zip
Merge branch 'stmmac-next'
Jose Abreu says: ==================== net: stmmac: Improvements for -next Misc improvements for stmmac. 1) Adds more information regarding HW Caps in the DebugFS file. 2) Allows interrupts to be independently enabled or disabled so that we don't have to schedule both TX and RX NAPIs. 3) Stops using a magic number in coalesce timer re-arm. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c22
1 files changed, 18 insertions, 4 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
index 1bc25aa86dbd..688d36095333 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
@@ -37,14 +37,28 @@ void dwmac_enable_dma_transmission(void __iomem *ioaddr)
writel(1, ioaddr + DMA_XMT_POLL_DEMAND);
}
-void dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan)
+void dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan, bool rx, bool tx)
{
- writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);
+ u32 value = readl(ioaddr + DMA_INTR_ENA);
+
+ if (rx)
+ value |= DMA_INTR_DEFAULT_RX;
+ if (tx)
+ value |= DMA_INTR_DEFAULT_TX;
+
+ writel(value, ioaddr + DMA_INTR_ENA);
}
-void dwmac_disable_dma_irq(void __iomem *ioaddr, u32 chan)
+void dwmac_disable_dma_irq(void __iomem *ioaddr, u32 chan, bool rx, bool tx)
{
- writel(0, ioaddr + DMA_INTR_ENA);
+ u32 value = readl(ioaddr + DMA_INTR_ENA);
+
+ if (rx)
+ value &= ~DMA_INTR_DEFAULT_RX;
+ if (tx)
+ value &= ~DMA_INTR_DEFAULT_TX;
+
+ writel(value, ioaddr + DMA_INTR_ENA);
}
void dwmac_dma_start_tx(void __iomem *ioaddr, u32 chan)