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| author |   Giuseppe Cavallaro <peppe.cavallaro@st.com> | 2016-02-29 14:27:38 +0100 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2016-03-02 14:21:33 -0500 |
| commit | 0e80bdc9a72df3b31a9fc2012102a6cc8d664e93 (patch) | |
| tree | c83e948287802fa31a5b298a4b5fc6aec7342670 /drivers/net/ethernet/stmicro/stmmac/enh_desc.c | |
| parent | stmmac: set dirty index out of the loop (diff) | |
| download | linux-dev-0e80bdc9a72df3b31a9fc2012102a6cc8d664e93.tar.xz linux-dev-0e80bdc9a72df3b31a9fc2012102a6cc8d664e93.zip | |
stmmac: first frame prep at the end of xmit routine
This patch is to fill the first descriptor just before granting
the DMA engine so at the end of the xmit.
The patch takes care about the algorithm adopted to mitigate the
interrupts, then it fixes the last segment in case of no fragments.
Moreover, this new implementation does not pass any "ter" field when
prepare the descriptors because this is not necessary.
The patch also details the memory barrier in the xmit.
As final results, this patch guarantees the same performances
but fixing a case if small datagram are sent. In fact, this
kind of test is impacted if no coalesce is done.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/enh_desc.c')
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/enh_desc.c | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c index 957610b72ace..cfb018c7c5eb 100644 --- a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c +++ b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c @@ -311,10 +311,15 @@ static void enh_desc_release_tx_desc(struct dma_desc *p, int mode) static void enh_desc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, bool csum_flag, int mode, bool tx_own, - bool ls_ic) + bool ls) { unsigned int tdes0 = p->des0; + if (mode == STMMAC_CHAIN_MODE) + enh_set_tx_desc_len_on_chain(p, len); + else + enh_set_tx_desc_len_on_ring(p, len); + if (is_fs) tdes0 |= ETDES0_FIRST_SEGMENT; else @@ -325,6 +330,10 @@ static void enh_desc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, else tdes0 &= ~(TX_CIC_FULL << ETDES0_CHECKSUM_INSERTION_SHIFT); + if (ls) + tdes0 |= ETDES0_LAST_SEGMENT; + + /* Finally set the OWN bit. Later the DMA will start! */ if (tx_own) tdes0 |= ETDES0_OWN; @@ -335,20 +344,12 @@ static void enh_desc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, */ wmb(); - if (ls_ic) - tdes0 |= ETDES0_LAST_SEGMENT | ETDES0_INTERRUPT; - p->des0 = tdes0; - - if (mode == STMMAC_CHAIN_MODE) - enh_set_tx_desc_len_on_chain(p, len); - else - enh_set_tx_desc_len_on_ring(p, len); } -static void enh_desc_clear_tx_ic(struct dma_desc *p) +static void enh_desc_set_tx_ic(struct dma_desc *p) { - p->des0 &= ~ETDES0_INTERRUPT; + p->des0 |= ETDES0_INTERRUPT; } static int enh_desc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type) @@ -419,7 +420,7 @@ const struct stmmac_desc_ops enh_desc_ops = { .get_tx_owner = enh_desc_get_tx_owner, .release_tx_desc = enh_desc_release_tx_desc, .prepare_tx_desc = enh_desc_prepare_tx_desc, - .clear_tx_ic = enh_desc_clear_tx_ic, + .set_tx_ic = enh_desc_set_tx_ic, .get_tx_ls = enh_desc_get_tx_ls, .set_tx_owner = enh_desc_set_tx_owner, .set_rx_owner = enh_desc_set_rx_owner, |