diff options
| author |   David Rivshin <drivshin@allworx.com> | 2016-02-12 19:45:36 -0500 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2016-02-17 10:50:15 -0500 |
| commit | d148bbd37a52b030b131ac5408c0f8293325ca0b (patch) | |
| tree | cd60a5a2d833d92b3027ce55e2ee03c563ab4289 /drivers/net/ethernet/ti/cpsw-phy-sel.c | |
| parent | phy: keep pause flags in phy driver features (diff) | |
| download | linux-dev-d148bbd37a52b030b131ac5408c0f8293325ca0b.tar.xz linux-dev-d148bbd37a52b030b131ac5408c0f8293325ca0b.zip | |
drivers: net: cpsw-phy-sel: add dev_warn() for unsupported PHY mode
The cpsw-phy-sel driver supports only MII, RMII, and RGMII PHY modes,
and silently handled any other values as if MII was specified. In a
case where the PHY mode was incorrectly specified, or a bug elsewhere,
there would be no indication of a problem. If MII was the correct mode,
then this will go unnoticed, otherwise the symptom will be a failure
to transmit/receive data over the RMII/RGMII link.
Add a dev_warn() to make this condition obvious and provide a
breadcrumb to follow.
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/ti/cpsw-phy-sel.c')
| -rw-r--r-- | drivers/net/ethernet/ti/cpsw-phy-sel.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/net/ethernet/ti/cpsw-phy-sel.c b/drivers/net/ethernet/ti/cpsw-phy-sel.c index e9cc61e1ec74..c3e85acfdc70 100644 --- a/drivers/net/ethernet/ti/cpsw-phy-sel.c +++ b/drivers/net/ethernet/ti/cpsw-phy-sel.c @@ -63,8 +63,12 @@ static void cpsw_gmii_sel_am3352(struct cpsw_phy_sel_priv *priv, mode = AM33XX_GMII_SEL_MODE_RGMII; break; - case PHY_INTERFACE_MODE_MII: default: + dev_warn(priv->dev, + "Unsupported PHY mode: \"%s\". Defaulting to MII.\n", + phy_modes(phy_mode)); + /* fallthrough */ + case PHY_INTERFACE_MODE_MII: mode = AM33XX_GMII_SEL_MODE_MII; break; }; @@ -106,8 +110,12 @@ static void cpsw_gmii_sel_dra7xx(struct cpsw_phy_sel_priv *priv, mode = AM33XX_GMII_SEL_MODE_RGMII; break; - case PHY_INTERFACE_MODE_MII: default: + dev_warn(priv->dev, + "Unsupported PHY mode: \"%s\". Defaulting to MII.\n", + phy_modes(phy_mode)); + /* fallthrough */ + case PHY_INTERFACE_MODE_MII: mode = AM33XX_GMII_SEL_MODE_MII; break; }; |