diff options
| author |   Robert Hancock <hancock@sedsystems.ca> | 2019-06-06 16:28:12 -0600 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2019-06-06 16:24:29 -0700 |
| commit | 489d4d7713d1cad40b1049720b44d08f53918b30 (patch) | |
| tree | 40a79f3728e64a07e9092f76414a756690bcd0f8 /drivers/net/ethernet/xilinx/xilinx_axienet.h | |
| parent | net: axienet: Re-initialize MDIO registers properly after reset (diff) | |
| download | linux-dev-489d4d7713d1cad40b1049720b44d08f53918b30.tar.xz linux-dev-489d4d7713d1cad40b1049720b44d08f53918b30.zip | |
net: axienet: Cleanup DMA device reset and halt process
The Xilinx DMA blocks each have their own reset register, but they both
reset the entire DMA engine, so only one of them needs to be reset.
Also, when stopping the device, we need to not just command the DMA
blocks to stop, but wait for them to stop, and trigger a device reset
to ensure that they are completely stopped.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/xilinx/xilinx_axienet.h')
| -rw-r--r-- | drivers/net/ethernet/xilinx/xilinx_axienet.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h b/drivers/net/ethernet/xilinx/xilinx_axienet.h index 4a135ed6e8a3..1ffb113e2c29 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet.h +++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h @@ -83,6 +83,8 @@ #define XAXIDMA_CR_RUNSTOP_MASK 0x00000001 /* Start/stop DMA channel */ #define XAXIDMA_CR_RESET_MASK 0x00000004 /* Reset DMA engine */ +#define XAXIDMA_SR_HALT_MASK 0x00000001 /* Indicates DMA channel halted */ + #define XAXIDMA_BD_NDESC_OFFSET 0x00 /* Next descriptor pointer */ #define XAXIDMA_BD_BUFA_OFFSET 0x08 /* Buffer address */ #define XAXIDMA_BD_CTRL_LEN_OFFSET 0x18 /* Control/buffer length */ |