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authorPuranjay Mohan <puranjay12@gmail.com>2019-06-21 21:10:35 +0530
committerDavid S. Miller <davem@davemloft.net>2019-06-26 13:05:42 -0700
commitf8da5dac7e5eebb8da93829eeb988cc37410c9e6 (patch)
tree23fc1a7956502dea6667f85f770c5fed702beb05 /drivers/net/fddi/skfp
parentMerge tag 'wireless-drivers-next-for-davem-2019-06-26' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next (diff)
downloadlinux-dev-f8da5dac7e5eebb8da93829eeb988cc37410c9e6.tar.xz
linux-dev-f8da5dac7e5eebb8da93829eeb988cc37410c9e6.zip
net: fddi: skfp: Rename local PCI defines to match generic PCI defines
Rename the PCI_REV_ID and other local defines to Generic PCI define names in skfbi.h and drvfbi.c to make it compatible with the pci_regs.h. Signed-off-by: Puranjay Mohan <puranjay12@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/fddi/skfp')
-rw-r--r--drivers/net/fddi/skfp/drvfbi.c2
-rw-r--r--drivers/net/fddi/skfp/h/skfbi.h4
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/fddi/skfp/drvfbi.c b/drivers/net/fddi/skfp/drvfbi.c
index bdd5700e71fa..b324c1acf195 100644
--- a/drivers/net/fddi/skfp/drvfbi.c
+++ b/drivers/net/fddi/skfp/drvfbi.c
@@ -127,7 +127,7 @@ static void card_start(struct s_smc *smc)
* at very first before any other initialization functions is
* executed.
*/
- rev_id = inp(PCI_C(PCI_REV_ID)) ;
+ rev_id = inp(PCI_C(PCI_REVISION_ID)) ;
if ((rev_id & 0xf0) == SK_ML_ID_1 || (rev_id & 0xf0) == SK_ML_ID_2) {
smc->hw.hw_is_64bit = TRUE ;
} else {
diff --git a/drivers/net/fddi/skfp/h/skfbi.h b/drivers/net/fddi/skfp/h/skfbi.h
index 89557457b352..5f9b631e7515 100644
--- a/drivers/net/fddi/skfp/h/skfbi.h
+++ b/drivers/net/fddi/skfp/h/skfbi.h
@@ -31,7 +31,7 @@
#define PCI_DEVICE_ID 0x02 /* 16 bit Device ID */
#define PCI_COMMAND 0x04 /* 16 bit Command */
#define PCI_STATUS 0x06 /* 16 bit Status */
-#define PCI_REV_ID 0x08 /* 8 bit Revision ID */
+#define PCI_REVISION_ID 0x08 /* 8 bit Revision ID */
#define PCI_CLASS_CODE 0x09 /* 24 bit Class Code */
#define PCI_CACHE_LSZ 0x0c /* 8 bit Cache Line Size */
#define PCI_LAT_TIM 0x0d /* 8 bit Latency Timer */
@@ -110,7 +110,7 @@
#define PCI_66MHZCAP 0x0020 /* Bit 5: 66 MHz PCI bus clock capable */
#define PCI_NEWCAP 0x0010 /* Bit 4: New cap. list implemented */
-#define PCI_ERRBITS (PCI_PERR|PCI_SERR|PCI_RMABORT|PCI_STABORT|PCI_DATAPERR)
+#define PCI_ERRBITS (PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_SIG_TARGET_ABORT | PCI_STATUS_PARITY)
/* PCI_REV_ID 8 bit Revision ID */
/* PCI_CLASS_CODE 24 bit Class Code */