diff options
| author |   Ben Greear <greearb@candelatech.com> | 2009-09-30 12:08:16 +0000 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2009-09-30 20:02:59 -0700 |
| commit | aad719182d9c6a785931efe87b978eb6f7742e0e (patch) | |
| tree | 81e969be4ac9aee0181f0734db8e8f2bb9d1009a /drivers/net/ixgbe/ixgbe_main.c | |
| parent | ixgbe: Bump driver version number (diff) | |
| download | linux-dev-aad719182d9c6a785931efe87b978eb6f7742e0e.tar.xz linux-dev-aad719182d9c6a785931efe87b978eb6f7742e0e.zip | |
ixgbe patch to provide NIC's tx/rx counters via ethtool
When LRO is enabled, the received packet and byte counters represent the
LRO'd packets, not the packets/bytes on the wire. The Intel 82599 NIC has
registers that keep count of the physical packets. Add these counters to
the ethtool stats. The byte counters are 36-bit, but the high 4 bits were
being ignored in the 2.6.31 ixgbe driver: Read those as well to allow
longer time between polling the stats to detect wraps.
Signed-off-by: Ben Greear <greearb@candelatech.com>
Acked-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_main.c')
| -rw-r--r-- | drivers/net/ixgbe/ixgbe_main.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index c19818303629..960967399209 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c @@ -4449,10 +4449,13 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter) /* 82598 hardware only has a 32 bit counter in the high register */ if (hw->mac.type == ixgbe_mac_82599EB) { + u64 tmp; adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL); - IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */ + tmp = IXGBE_READ_REG(hw, IXGBE_GORCH) & 0xF; /* 4 high bits of GORC */ + adapter->stats.gorc += (tmp << 32); adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL); - IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */ + tmp = IXGBE_READ_REG(hw, IXGBE_GOTCH) & 0xF; /* 4 high bits of GOTC */ + adapter->stats.gotc += (tmp << 32); adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORL); IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */ adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); |