diff options
author | Antoine Tenart <antoine.tenart@bootlin.com> | 2020-06-25 17:42:08 +0200 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2020-06-25 16:22:11 -0700 |
commit | d9608aacd3c0272a5a363e5002c7102ddd4529b6 (patch) | |
tree | 32cd93a1ada56a1edc3232205123ef895c61be28 /drivers/net/phy/mscc/mscc_ptp.c | |
parent | net: phy: mscc: ptp: fix a typo in a comment (diff) | |
download | linux-dev-d9608aacd3c0272a5a363e5002c7102ddd4529b6.tar.xz linux-dev-d9608aacd3c0272a5a363e5002c7102ddd4529b6.zip |
net: phy: mscc: do not access the MDIO bus lock directly
This patch improves the MSCC driver by using the provided
phy_lock_mdio_bus and phy_unlock_mdio_bus helpers instead of locking and
unlocking the MDIO bus lock directly. The patch is only cosmetic but
should improve maintenance and consistency.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/mscc/mscc_ptp.c')
-rw-r--r-- | drivers/net/phy/mscc/mscc_ptp.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/net/phy/mscc/mscc_ptp.c b/drivers/net/phy/mscc/mscc_ptp.c index d4266911efc5..ef3441747348 100644 --- a/drivers/net/phy/mscc/mscc_ptp.c +++ b/drivers/net/phy/mscc/mscc_ptp.c @@ -80,7 +80,7 @@ static u32 vsc85xx_ts_read_csr(struct phy_device *phydev, enum ts_blk blk, break; } - mutex_lock(&phydev->mdio.bus->mdio_lock); + phy_lock_mdio_bus(phydev); phy_ts_base_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_1588); @@ -98,7 +98,7 @@ static u32 vsc85xx_ts_read_csr(struct phy_device *phydev, enum ts_blk blk, phy_ts_base_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_STANDARD); - mutex_unlock(&phydev->mdio.bus->mdio_lock); + phy_unlock_mdio_bus(phydev); return val; } @@ -130,7 +130,7 @@ static void vsc85xx_ts_write_csr(struct phy_device *phydev, enum ts_blk blk, break; } - mutex_lock(&phydev->mdio.bus->mdio_lock); + phy_lock_mdio_bus(phydev); bypass = phy_ts_base_read(phydev, MSCC_PHY_BYPASS_CONTROL); @@ -154,7 +154,7 @@ static void vsc85xx_ts_write_csr(struct phy_device *phydev, enum ts_blk blk, if (cond && upper) phy_ts_base_write(phydev, MSCC_PHY_BYPASS_CONTROL, bypass); - mutex_unlock(&phydev->mdio.bus->mdio_lock); + phy_unlock_mdio_bus(phydev); } /* Pick bytes from PTP header */ @@ -1273,7 +1273,7 @@ static int __vsc8584_init_ptp(struct phy_device *phydev) u32 val; if (!vsc8584_is_1588_input_clk_configured(phydev)) { - mutex_lock(&phydev->mdio.bus->mdio_lock); + phy_lock_mdio_bus(phydev); /* 1588_DIFF_INPUT_CLK configuration: Use an external clock for * the LTC, as per 3.13.29 in the VSC8584 datasheet. @@ -1285,7 +1285,7 @@ static int __vsc8584_init_ptp(struct phy_device *phydev) phy_ts_base_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_STANDARD); - mutex_unlock(&phydev->mdio.bus->mdio_lock); + phy_unlock_mdio_bus(phydev); vsc8584_set_input_clk_configured(phydev); } |