diff options
| author |   Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com> | 2017-09-15 12:01:58 +0530 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2017-09-18 16:33:18 -0700 |
| commit | f2654a4781318dc7ab8d6cde66f1fa39eab980a9 (patch) | |
| tree | 33f494ace32d312982c077589809070e2ce4c4d5 /drivers/net/phy/xilinx_gmii2rgmii.c | |
| parent | ip6_gre: skb_push ipv6hdr before packing the header in ip6gre_header (diff) | |
| download | linux-dev-f2654a4781318dc7ab8d6cde66f1fa39eab980a9.tar.xz linux-dev-f2654a4781318dc7ab8d6cde66f1fa39eab980a9.zip | |
net: phy: Fix mask value write on gmii2rgmii converter speed register
To clear Speed Selection in MDIO control register(0x10),
ie, clear bits 6 and 13 to zero while keeping other bits same.
Before AND operation,The Mask value has to be perform with bitwise NOT
operation (ie, ~ operator)
This patch clears current speed selection before writing the
new speed settings to gmii2rgmii converter
Fixes: f411a6160bd4 ("net: phy: Add gmiitorgmii converter support")
Signed-off-by: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/xilinx_gmii2rgmii.c')
| -rw-r--r-- | drivers/net/phy/xilinx_gmii2rgmii.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c b/drivers/net/phy/xilinx_gmii2rgmii.c index d15dd3938ba8..2e5150b0b8d5 100644 --- a/drivers/net/phy/xilinx_gmii2rgmii.c +++ b/drivers/net/phy/xilinx_gmii2rgmii.c @@ -44,7 +44,7 @@ static int xgmiitorgmii_read_status(struct phy_device *phydev) priv->phy_drv->read_status(phydev); val = mdiobus_read(phydev->mdio.bus, priv->addr, XILINX_GMII2RGMII_REG); - val &= XILINX_GMII2RGMII_SPEED_MASK; + val &= ~XILINX_GMII2RGMII_SPEED_MASK; if (phydev->speed == SPEED_1000) val |= BMCR_SPEED1000; |