diff options
| author |   Stephen Hemminger <shemminger@osdl.org> | 2006-02-22 10:28:33 -0800 |
|---|---|---|
| committer |   Francois Romieu <romieu@fr.zoreil.com> | 2006-02-23 23:07:07 +0100 |
| commit | a9cdab869ec343ccc601484fb535813e16c25f70 (patch) | |
| tree | 64d12d8befe316c1e7ef1254612b84acfc8024d4 /drivers/net/skge.c | |
| parent | r8169: enable wake on lan (diff) | |
| download | linux-dev-a9cdab869ec343ccc601484fb535813e16c25f70.tar.xz linux-dev-a9cdab869ec343ccc601484fb535813e16c25f70.zip | |
skge: NAPI/irq race fix
Fix a race in the receive NAPI, irq handling. The interrupt clear and the
start need to be separated. Otherwise there is a window between the last
frame received and the NAPI done level handling.
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Diffstat (limited to 'drivers/net/skge.c')
| -rw-r--r-- | drivers/net/skge.c | 17 |
1 files changed, 5 insertions, 12 deletions
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index 67fb19b8fde9..869c7cfb99a4 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c @@ -2678,8 +2678,7 @@ static int skge_poll(struct net_device *dev, int *budget) /* restart receiver */ wmb(); - skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), - CSR_START | CSR_IRQ_CL_F); + skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), CSR_START); *budget -= work_done; dev->quota -= work_done; @@ -2856,14 +2855,6 @@ static void skge_extirq(unsigned long data) local_irq_enable(); } -static inline void skge_wakeup(struct net_device *dev) -{ - struct skge_port *skge = netdev_priv(dev); - - prefetch(skge->rx_ring.to_clean); - netif_rx_schedule(dev); -} - static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs) { struct skge_hw *hw = dev_id; @@ -2874,13 +2865,15 @@ static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs) status &= hw->intr_mask; if (status & IS_R1_F) { + skge_write8(hw, Q_ADDR(Q_R1, Q_CSR), CSR_IRQ_CL_F); hw->intr_mask &= ~IS_R1_F; - skge_wakeup(hw->dev[0]); + netif_rx_schedule(hw->dev[0]); } if (status & IS_R2_F) { + skge_write8(hw, Q_ADDR(Q_R2, Q_CSR), CSR_IRQ_CL_F); hw->intr_mask &= ~IS_R2_F; - skge_wakeup(hw->dev[1]); + netif_rx_schedule(hw->dev[1]); } if (status & IS_XA1_F) |