diff options
| author |   Takashi Iwai <tiwai@suse.de> | 2009-12-03 05:12:02 +0000 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2009-12-11 14:54:31 -0800 |
| commit | d66f0b20b2f8eac365fadf5ca492efe4ba539446 (patch) | |
| tree | 64f923924269ee0faf38ed194e5b955045d4ce2b /drivers/net/sky2.c | |
| parent | net: Fix Yukon-2 Optima TCP offload setup (diff) | |
| download | linux-dev-d66f0b20b2f8eac365fadf5ca492efe4ba539446.tar.xz linux-dev-d66f0b20b2f8eac365fadf5ca492efe4ba539446.zip | |
net: Add missing TST_CFG_WRITE bits around sky2_pci_write
Add missing TST_CFG_WRITE bits around sky2_pci_write*() in Optima
setup routines. Without the cfg-write bits, the driver may spew endless
link-up messages through qlink irq.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sky2.c')
| -rw-r--r-- | drivers/net/sky2.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 050e6b58d4f9..013c9f52ceaa 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c @@ -2152,7 +2152,9 @@ static void sky2_qlink_intr(struct sky2_hw *hw) /* reset PHY Link Detect */ phy = sky2_pci_read16(hw, PSM_CONFIG_REG4); + sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1); + sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); sky2_link_up(sky2); } @@ -3082,6 +3084,7 @@ static void sky2_reset(struct sky2_hw *hw) reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE; /* reset PHY Link Detect */ + sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); sky2_pci_write16(hw, PSM_CONFIG_REG4, reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT); sky2_pci_write16(hw, PSM_CONFIG_REG4, reg); @@ -3099,6 +3102,7 @@ static void sky2_reset(struct sky2_hw *hw) /* restore the PCIe Link Control register */ sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg); } + sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */ sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); |