diff options
| author |   Michael Chan <mchan@broadcom.com> | 2005-08-09 20:17:41 -0700 |
|---|---|---|
| committer |   David S. Miller <davem@sunset.davemloft.net> | 2005-08-29 15:50:49 -0700 |
| commit | 087fe256f0aef8d16b19a30c6fb10b899bf1a701 (patch) | |
| tree | 64e88bc4cb0984f225ef7830aef566f5ba0d203e /drivers/net/tg3.c | |
| parent | [TG3]: Eliminate one register write in tg3_restart_ints() (diff) | |
| download | linux-dev-087fe256f0aef8d16b19a30c6fb10b899bf1a701.tar.xz linux-dev-087fe256f0aef8d16b19a30c6fb10b899bf1a701.zip | |
[TG3]: Fix bug in setting a tg3_flag
Found a bug while reviewing the patches the second time.
The TG3_FLAG_TXD_MBOX_HWBUG flag is set after the register access
methods have been determined. This patch fixes it by moving it up before
the various access methods are assigned.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
| -rw-r--r-- | drivers/net/tg3.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 8bc28b14c70f..af8263a1580e 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -9408,6 +9408,12 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) } } + /* 5700 BX chips need to have their TX producer index mailboxes + * written twice to workaround a bug. + */ + if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX) + tp->tg3_flags |= TG3_FLAG_TXD_MBOX_HWBUG; + /* Back to back register writes can cause problems on this chip, * the workaround is to read back all reg writes except those to * mailbox regs. See tg3_write_indirect_reg32(). @@ -9682,14 +9688,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) else tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES; - /* 5700 BX chips need to have their TX producer index mailboxes - * written twice to workaround a bug. - */ - if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX) - tp->tg3_flags |= TG3_FLAG_TXD_MBOX_HWBUG; - else - tp->tg3_flags &= ~TG3_FLAG_TXD_MBOX_HWBUG; - /* It seems all chips can get confused if TX buffers * straddle the 4GB address boundary in some cases. */ |