diff options
| author |   hayeswang <hayeswang@realtek.com> | 2014-01-02 11:22:40 +0800 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2014-01-01 22:54:14 -0500 |
| commit | ac244d3ee76047165e5e3b92947d276c62ba4d7c (patch) | |
| tree | c381dd35e2c17bed4693e73c569e778e4d88589a /drivers/net/usb | |
| parent | r8152: move rtl8152_unload and ocp_reg_write (diff) | |
| download | linux-dev-ac244d3ee76047165e5e3b92947d276c62ba4d7c.tar.xz linux-dev-ac244d3ee76047165e5e3b92947d276c62ba4d7c.zip | |
r8152: modify the method of accessing PHY
The old method to access PHY is through mdio channel. Replace it
with the OCP channel.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/usb')
| -rw-r--r-- | drivers/net/usb/r8152.c | 52 |
1 files changed, 18 insertions, 34 deletions
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c index 79bb55302655..b8bc3eb72721 100644 --- a/drivers/net/usb/r8152.c +++ b/drivers/net/usb/r8152.c @@ -98,6 +98,7 @@ #define OCP_EEE_CONFIG1 0x2080 #define OCP_EEE_CONFIG2 0x2092 #define OCP_EEE_CONFIG3 0x2094 +#define OCP_BASE_MII 0xa400 #define OCP_EEE_AR 0xa41a #define OCP_EEE_DATA 0xa41c @@ -653,7 +654,7 @@ static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data) generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type); } -static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data) +static u16 ocp_reg_read(struct r8152 *tp, u16 addr) { u16 ocp_base, ocp_index; @@ -664,48 +665,31 @@ static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data) } ocp_index = (addr & 0x0fff) | 0xb000; - ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data); + return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index); } -static void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value) +static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data) { - u32 ocp_data; - int i; - - ocp_data = PHYAR_FLAG | ((reg_addr & 0x1f) << 16) | - (value & 0xffff); - - ocp_write_dword(tp, MCU_TYPE_PLA, PLA_PHYAR, ocp_data); + u16 ocp_base, ocp_index; - for (i = 20; i > 0; i--) { - udelay(25); - ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_PHYAR); - if (!(ocp_data & PHYAR_FLAG)) - break; + ocp_base = addr & 0xf000; + if (ocp_base != tp->ocp_base) { + ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base); + tp->ocp_base = ocp_base; } - udelay(20); + + ocp_index = (addr & 0x0fff) | 0xb000; + ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data); } -static int r8152_mdio_read(struct r8152 *tp, u32 reg_addr) +static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value) { - u32 ocp_data; - int i; - - ocp_data = (reg_addr & 0x1f) << 16; - ocp_write_dword(tp, MCU_TYPE_PLA, PLA_PHYAR, ocp_data); - - for (i = 20; i > 0; i--) { - udelay(25); - ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_PHYAR); - if (ocp_data & PHYAR_FLAG) - break; - } - udelay(20); - - if (!(ocp_data & PHYAR_FLAG)) - return -EAGAIN; + ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value); +} - return (u16)(ocp_data & 0xffff); +static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr) +{ + return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2); } static int read_mii_word(struct net_device *netdev, int phy_id, int reg) |