diff options
| author |   Govind Singh <govinds@codeaurora.org> | 2019-02-08 14:55:33 +0200 |
|---|---|---|
| committer |   Kalle Valo <kvalo@codeaurora.org> | 2019-02-11 18:29:49 +0200 |
| commit | de8781d7e74d0a5ba7938330476c9d33f7db4c83 (patch) | |
| tree | 4f30968300d1e0b87f1a86c039463d9e2fc8dd62 /drivers/net/wireless/ath/ath10k/pci.c | |
| parent | ath10k: enable bus layer suspend/resume for WCN3990 (diff) | |
| download | linux-dev-de8781d7e74d0a5ba7938330476c9d33f7db4c83.tar.xz linux-dev-de8781d7e74d0a5ba7938330476c9d33f7db4c83.zip | |
ath10k: disable interface pause wow config for integrated chipset
wow pause iface config controls the PCI D0/D3-WOW cases for pcie
bus state. Firmware does not expects WOW_IFACE_PAUSE_ENABLED config
for bus/link that cannot be suspended ex:snoc and does not trigger
common subsystem shutdown.
Disable interface pause wow config for integrated chipset(WCN3990)
for correct WOW configuration in the firmware.
Testing:
Tested on WCN3990 HW.
Tested FW: WLAN.HL.2.0-01192-QCAHLSWMTPLZ-1.
Signed-off-by: Govind Singh <govinds@codeaurora.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'drivers/net/wireless/ath/ath10k/pci.c')
| -rw-r--r-- | drivers/net/wireless/ath/ath10k/pci.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c index 7dd35599d09f..eb18e8ea0b54 100644 --- a/drivers/net/wireless/ath/ath10k/pci.c +++ b/drivers/net/wireless/ath/ath10k/pci.c @@ -2283,7 +2283,7 @@ static int ath10k_pci_get_num_banks(struct ath10k *ar) return 1; case QCA6164_2_1_DEVICE_ID: case QCA6174_2_1_DEVICE_ID: - switch (MS(ar->chip_id, SOC_CHIP_ID_REV)) { + switch (MS(ar->bus_param.chip_id, SOC_CHIP_ID_REV)) { case QCA6174_HW_1_0_CHIP_ID_REV: case QCA6174_HW_1_1_CHIP_ID_REV: case QCA6174_HW_2_1_CHIP_ID_REV: @@ -3636,6 +3636,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev, } bus_params.dev_type = ATH10K_DEV_TYPE_LL; + bus_params.link_can_suspend = true; bus_params.chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS); if (bus_params.chip_id == 0xffffffff) { ath10k_err(ar, "failed to get chip id\n"); |