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| author |   Manikanta Pubbisetty <quic_mpubbise@quicinc.com> | 2022-09-07 11:36:49 +0300 |
|---|---|---|
| committer |   Kalle Valo <quic_kvalo@quicinc.com> | 2022-09-10 09:27:54 +0300 |
| commit | 7636c9a6e7d7996ca0b7f31f61f0e55ef5ff89d5 (patch) | |
| tree | 7b926b8934b80e6a2b20e14238ca41329dfb44d3 /drivers/net/wireless/ath/ath11k/hal.h | |
| parent | wifi: ath11k: Enable threaded NAPI (diff) | |
| download | linux-dev-7636c9a6e7d7996ca0b7f31f61f0e55ef5ff89d5.tar.xz linux-dev-7636c9a6e7d7996ca0b7f31f61f0e55ef5ff89d5.zip | |
wifi: ath11k: Add multi TX ring support for WCN6750
Currently in the case of WCN6750, only one TCL ring is used for TX,
this is limiting the TX throughput in 160 MHz case, enabling multiple
TCL rings on WCN6750 has shown an improvement of nearly 300 Mbps in
the case of TCP TX, therefore add the support of multi TX ring for
WCN6750.
Currently TCL ring is selected based on CPU ID, this logic cannot be
applied for WCN6750 as there is chance of out of order TX of packets
and to avoid this, choose TCL ring based on flow hash so that packets
of the same flow will end up on same TCL ring. For the same reason,
TCL ring retry logic is also not applicable for WCN6750.
Also the mapping of TCL, WBM & RBM IDs for WCN6750 is different from
existing devices. Create a new TCM/WBM/RBM mapping for WCN6750.
Change does not impact existing ath11k devices.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/20220905071805.31625-3-quic_mpubbise@quicinc.com
Diffstat (limited to 'drivers/net/wireless/ath/ath11k/hal.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath11k/hal.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath11k/hal.h b/drivers/net/wireless/ath/ath11k/hal.h index 110c337ddf33..e0358062ca2b 100644 --- a/drivers/net/wireless/ath/ath11k/hal.h +++ b/drivers/net/wireless/ath/ath11k/hal.h @@ -389,6 +389,7 @@ enum hal_srng_ring_id { HAL_SRNG_RING_ID_WBM2SW1_RELEASE, HAL_SRNG_RING_ID_WBM2SW2_RELEASE, HAL_SRNG_RING_ID_WBM2SW3_RELEASE, + HAL_SRNG_RING_ID_WBM2SW4_RELEASE, HAL_SRNG_RING_ID_UMAC_ID_END = 127, HAL_SRNG_RING_ID_LMAC1_ID_START, @@ -678,6 +679,7 @@ enum hal_rx_buf_return_buf_manager { HAL_RX_BUF_RBM_SW1_BM, HAL_RX_BUF_RBM_SW2_BM, HAL_RX_BUF_RBM_SW3_BM, + HAL_RX_BUF_RBM_SW4_BM, }; #define HAL_SRNG_DESC_LOOP_CNT 0xf0000000 |