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authorFelix Fietkau <nbd@openwrt.org>2010-12-19 00:31:54 +0100
committerJohn W. Linville <linville@tuxdriver.com>2010-12-20 14:52:18 -0500
commitf1a8abb0459e96765bd1d300f434256d8dfac73d (patch)
tree2389b4e315386596bd51d7f24a2e7b7de57d3878 /drivers/net/wireless/ath/ath9k/ar9003_paprd.c
parentmac80211: fix potentially redundant skb data copying (diff)
downloadlinux-dev-f1a8abb0459e96765bd1d300f434256d8dfac73d.tar.xz
linux-dev-f1a8abb0459e96765bd1d300f434256d8dfac73d.zip
ath9k_hw: fix PA predistortion HT40 mask
The commit 'ath9k_hw: Disable PAPRD for rates with low Tx power' changed the code that sets the PAPRD rate masks to use only either the HT20 mask or the HT40 mask. This is wrong, as the hardware can still use HT20 rates even when configured for HT40, and the operating channel mode does not affect PAPRD operation. The register for the HT40 rate mask is applied as a mask on top of the other registers to selectively disable PAPRD for specific rates on HT40 packets only. This patch changes the code back to the old behavior which matches the intended use of these registers. While with current cards this should not make any practical difference (according to Atheros, the HT20 and HT40 mask should always be equal), it is more correct that way, and maybe the HT40 mask will be used for some rare corner cases in the future. Cc: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_paprd.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_paprd.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
index 79554c524b68..356d2fd78822 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
@@ -134,7 +134,7 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah)
REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2PM, AR_PHY_PAPRD_AM2PM_MASK,
ah->paprd_ratemask);
REG_RMW_FIELD(ah, AR_PHY_PAPRD_HT40, AR_PHY_PAPRD_HT40_MASK,
- AR_PHY_PAPRD_HT40_MASK);
+ ah->paprd_ratemask_ht40);
for (i = 0; i < ah->caps.max_txchains; i++) {
REG_RMW_FIELD(ah, ctrl0[i],