diff options
| author |   Olof Johansson <olof@lixom.net> | 2012-09-20 19:57:38 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2012-09-20 19:57:38 -0700 |
| commit | 32dec75349da4e68b53f099ce3a96469cdc334d6 (patch) | |
| tree | 96aca7914b07697668ec716a3f80fb8c82e7a971 /drivers/net/wireless/ath/ath9k/ar9003_phy.h | |
| parent | ARM: tegra: harmony: fix ldo7 regulator-name (diff) | |
| parent | ASoC: tegra: remove support of legacy DMA driver based access (diff) | |
| download | linux-dev-32dec75349da4e68b53f099ce3a96469cdc334d6.tar.xz linux-dev-32dec75349da4e68b53f099ce3a96469cdc334d6.zip | |
Merge tag 'tegra-for-3.7-dmaengine' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup
ARM: tegra: switch to dmaengine
The Tegra code-base has contained both a legacy DMA and a dmaengine
driver since v3.6-rcX. This series flips Tegra's defconfig to enable
dmaengine rather than the legacy driver, and removes the legacy driver
and all client code.
* tag 'tegra-for-3.7-dmaengine' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ASoC: tegra: remove support of legacy DMA driver based access
spi: tegra: remove support of legacy DMA driver based access
ARM: tegra: apbio: remove support of legacy DMA driver based access
ARM: tegra: dma: remove legacy APB DMA driver
ARM: tegra: config: enable dmaengine based APB DMA driver
+ sync to 3.6-rc6
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_phy.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_phy.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h index 7bfbaf065a43..84d3d4956861 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h @@ -625,6 +625,10 @@ #define AR_PHY_AIC_CTRL_4_B0 (AR_SM_BASE + 0x4c0) #define AR_PHY_AIC_STAT_2_B0 (AR_SM_BASE + 0x4cc) +#define AR_PHY_65NM_CH0_TXRF3 0x16048 +#define AR_PHY_65NM_CH0_TXRF3_CAPDIV2G 0x0000001e +#define AR_PHY_65NM_CH0_TXRF3_CAPDIV2G_S 1 + #define AR_PHY_65NM_CH0_SYNTH4 0x1608c #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT (AR_SREV_9462(ah) ? 0x00000001 : 0x00000002) #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT_S (AR_SREV_9462(ah) ? 0 : 1) |