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authorFelix Fietkau <nbd@openwrt.org>2012-04-19 21:18:26 +0200
committerJohn W. Linville <linville@tuxdriver.com>2012-04-23 15:35:31 -0400
commit7c5adc8d83c344dbad251091879baf1244007564 (patch)
tree05494972ed0de7a8f9e0f634276400b597a126c2 /drivers/net/wireless/ath/ath9k/hw.h
parentath9k_hw: increase symbol overlap window for half/quarter channels (diff)
downloadlinux-dev-7c5adc8d83c344dbad251091879baf1244007564.tar.xz
linux-dev-7c5adc8d83c344dbad251091879baf1244007564.zip
ath9k_hw: fix and clean up PHY activation delay
The delay calculation is the same for all chips, however some parts of the code missed the extra delay factor for half/quarter. Clean up the code and move the delay calculation to a common place. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 8c827a183fc0..8535f76699af 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -923,6 +923,8 @@ void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val);
void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna);
/* General Operation */
+void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,
+ int hw_delay);
bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,
int column, unsigned int *writecnt);