diff options
| author |   Eyal Reizer <eyalreizer@gmail.com> | 2015-04-29 17:50:03 +0300 |
|---|---|---|
| committer |   Kalle Valo <kvalo@codeaurora.org> | 2015-05-09 16:42:27 +0300 |
| commit | bd763482c82ea24aacb51e0ba92b24074143bc86 (patch) | |
| tree | e1fcab6dfb5cd40d281bb61bf268a4e83a81851a /drivers/net/wireless/ti/wl18xx/main.c | |
| parent | wireless: fix typos in mwifiex and rtlwifi (diff) | |
| download | linux-dev-bd763482c82ea24aacb51e0ba92b24074143bc86.tar.xz linux-dev-bd763482c82ea24aacb51e0ba92b24074143bc86.zip | |
wl18xx: wlan_irq: support platform dependent interrupt types
* Interrupt request need to happen when the wilink chip is powered on and
driving the wlan_irq line. This avoids spurious interrupt issues that
are a result of different external pulls configuration on different
platforms
* Allow working with wl18xx level-low and falling edge irqs by configuring
wl18xx to invert the device interrupt
Signed-off-by: Eyal Reizer <eyalr@ti.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'drivers/net/wireless/ti/wl18xx/main.c')
| -rw-r--r-- | drivers/net/wireless/ti/wl18xx/main.c | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/drivers/net/wireless/ti/wl18xx/main.c b/drivers/net/wireless/ti/wl18xx/main.c index 717c4f5a02c2..dc48448b76c0 100644 --- a/drivers/net/wireless/ti/wl18xx/main.c +++ b/drivers/net/wireless/ti/wl18xx/main.c @@ -24,6 +24,7 @@ #include <linux/ip.h> #include <linux/firmware.h> #include <linux/etherdevice.h> +#include <linux/irq.h> #include "../wlcore/wlcore.h" #include "../wlcore/debug.h" @@ -578,7 +579,7 @@ static struct wl18xx_priv_conf wl18xx_default_priv_conf = { static const struct wlcore_partition_set wl18xx_ptable[PART_TABLE_LEN] = { [PART_TOP_PRCM_ELP_SOC] = { - .mem = { .start = 0x00A02000, .size = 0x00010000 }, + .mem = { .start = 0x00A00000, .size = 0x00012000 }, .reg = { .start = 0x00807000, .size = 0x00005000 }, .mem2 = { .start = 0x00800000, .size = 0x0000B000 }, .mem3 = { .start = 0x00000000, .size = 0x00000000 }, @@ -862,6 +863,7 @@ static int wl18xx_pre_upload(struct wl1271 *wl) { u32 tmp; int ret; + u16 irq_invert; BUILD_BUG_ON(sizeof(struct wl18xx_mac_and_phy_params) > WL18XX_PHY_INIT_MEM_SIZE); @@ -911,6 +913,28 @@ static int wl18xx_pre_upload(struct wl1271 *wl) /* re-enable FDSP clock */ ret = wlcore_write32(wl, WL18XX_PHY_FPGA_SPARE_1, MEM_FDSP_CLK_120_ENABLE); + if (ret < 0) + goto out; + + ret = irq_get_trigger_type(wl->irq); + if ((ret == IRQ_TYPE_LEVEL_LOW) || (ret == IRQ_TYPE_EDGE_FALLING)) { + wl1271_info("using inverted interrupt logic: %d", ret); + ret = wlcore_set_partition(wl, + &wl->ptable[PART_TOP_PRCM_ELP_SOC]); + if (ret < 0) + goto out; + + ret = wl18xx_top_reg_read(wl, TOP_FN0_CCCR_REG_32, &irq_invert); + if (ret < 0) + goto out; + + irq_invert |= BIT(1); + ret = wl18xx_top_reg_write(wl, TOP_FN0_CCCR_REG_32, irq_invert); + if (ret < 0) + goto out; + + ret = wlcore_set_partition(wl, &wl->ptable[PART_PHY_INIT]); + } out: return ret; |