diff options
| author |   Luis R. Rodriguez <lrodriguez@atheros.com> | 2010-08-30 19:26:33 -0400 |
|---|---|---|
| committer |   John W. Linville <linville@tuxdriver.com> | 2010-08-31 14:52:23 -0400 |
| commit | 904879748d7439a6dabdc6be9aad983e216b027d (patch) | |
| tree | d145dce26e172efa824dd4bbcfb1aa9381cca197 /drivers/net | |
| parent | ath9k_hw: Fix EEPROM uncompress block reading on AR9003 (diff) | |
| download | linux-dev-904879748d7439a6dabdc6be9aad983e216b027d.tar.xz linux-dev-904879748d7439a6dabdc6be9aad983e216b027d.zip | |
ath9k_hw: fix parsing of HT40 5 GHz CTLs
The 5 GHz CTL indexes were not being read for all hardware
devices due to the masking out through the CTL_MODE_M mask
being one bit too short. Without this the calibrated regulatory
maximum values were not being picked up when devices operate
on 5 GHz in HT40 mode. The final output power used for Atheros
devices is the minimum between the calibrated CTL values and
what CRDA provides.
Cc: stable@kernel.org [2.6.27+]
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/eeprom.h | 2 | ||||
| -rw-r--r-- | drivers/net/wireless/ath/regd.h | 1 |
2 files changed, 1 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h index 7f48df1e2903..0b09db0f8e7d 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom.h +++ b/drivers/net/wireless/ath/ath9k/eeprom.h @@ -62,7 +62,7 @@ #define SD_NO_CTL 0xE0 #define NO_CTL 0xff -#define CTL_MODE_M 7 +#define CTL_MODE_M 0xf #define CTL_11A 0 #define CTL_11B 1 #define CTL_11G 2 diff --git a/drivers/net/wireless/ath/regd.h b/drivers/net/wireless/ath/regd.h index a1c39526161a..345dd9721b41 100644 --- a/drivers/net/wireless/ath/regd.h +++ b/drivers/net/wireless/ath/regd.h @@ -31,7 +31,6 @@ enum ctl_group { #define NO_CTL 0xff #define SD_NO_CTL 0xE0 #define NO_CTL 0xff -#define CTL_MODE_M 7 #define CTL_11A 0 #define CTL_11B 1 #define CTL_11G 2 |