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| author |   Hersen Wu <hersenxs.wu@amd.com> | 2020-02-13 10:42:25 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-03-10 17:31:10 -0400 |
| commit | 1d2686d417c5998af3817f93be01745b3db57ecd (patch) | |
| tree | cdf520b60e4549e0ff5b2ae01c81971375b75431 /drivers/of | |
| parent | drm/amdgpu: correct ROM_INDEX/DATA offset for VEGA20 (diff) | |
| download | linux-dev-1d2686d417c5998af3817f93be01745b3db57ecd.tar.xz linux-dev-1d2686d417c5998af3817f93be01745b3db57ecd.zip | |
drm/amdgpu/powerplay: nv1x, renior copy dcn clock settings of watermark to smu during boot up
dc to pplib interface is changed for navi1x, renoir.
display_config_changed is not called by dc anymore.
smu_write_watermarks_table is not executed for navi1x, renoir
during boot up.
solution: call smu_write_watermarks_table just after dc pass
watermark clock settings to pplib
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/of')
0 files changed, 0 insertions, 0 deletions