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| author |   Vidya Sagar <vidyas@nvidia.com> | 2019-08-13 17:06:22 +0530 |
|---|---|---|
| committer |   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2019-08-13 16:00:46 +0100 |
| commit | 07f123def73e07e398537be7a5b43a244cb0cbf3 (patch) | |
| tree | 7aca0edb6c9de7b51f3a94c5362d3e68917c2302 /drivers/pci/controller/dwc/pcie-designware.c | |
| parent | dt-bindings: PCI: designware: Add binding for CDM register check (diff) | |
| download | linux-dev-07f123def73e07e398537be7a5b43a244cb0cbf3.tar.xz linux-dev-07f123def73e07e398537be7a5b43a244cb0cbf3.zip | |
PCI: dwc: Add support to enable CDM register check
Add support to enable CDM (Configuration Dependent Module) register
check for any data corruption based on the DT property
'snps,enable-cdm-check'.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware.c')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 1d87e823de21..59eaeeb21dbe 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -547,4 +547,11 @@ void dw_pcie_setup(struct dw_pcie *pci) break; } dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val); + + if (of_property_read_bool(np, "snps,enable-cdm-check")) { + val = dw_pcie_readl_dbi(pci, PCIE_PL_CHK_REG_CONTROL_STATUS); + val |= PCIE_PL_CHK_REG_CHK_REG_CONTINUOUS | + PCIE_PL_CHK_REG_CHK_REG_START; + dw_pcie_writel_dbi(pci, PCIE_PL_CHK_REG_CONTROL_STATUS, val); + } } |