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authorMarc Zyngier <maz@kernel.org>2021-09-29 17:38:41 +0100
committerBjorn Helgaas <bhelgaas@google.com>2021-11-04 16:29:30 -0500
commit946d619fa25f55483206befb035fed6a99fbe7b5 (patch)
tree808c519bd2557ea4061f34426800d59d94d8875d /drivers/pci/controller
parentPCI: apple: Implement MSI support (diff)
downloadlinux-dev-946d619fa25f55483206befb035fed6a99fbe7b5.tar.xz
linux-dev-946d619fa25f55483206befb035fed6a99fbe7b5.zip
iommu/dart: Exclude MSI doorbell from PCIe device IOVA range
The MSI doorbell on Apple HW can be any address in the low 4GB range. However, the MSI write is matched by the PCIe block before hitting the iommu. It must thus be excluded from the IOVA range that is assigned to any PCIe device. Link: https://lore.kernel.org/r/20210929163847.2807812-9-maz@kernel.org Tested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Sven Peter <sven@svenpeter.dev>
Diffstat (limited to 'drivers/pci/controller')
-rw-r--r--drivers/pci/controller/Kconfig5
-rw-r--r--drivers/pci/controller/pcie-apple.c4
2 files changed, 8 insertions, 1 deletions
diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig
index 953d9acc031f..5661d4a84832 100644
--- a/drivers/pci/controller/Kconfig
+++ b/drivers/pci/controller/Kconfig
@@ -312,6 +312,11 @@ config PCIE_HISI_ERR
Say Y here if you want error handling support
for the PCIe controller's errors on HiSilicon HIP SoCs
+config PCIE_APPLE_MSI_DOORBELL_ADDR
+ hex
+ default 0xfffff000
+ depends on PCIE_APPLE
+
config PCIE_APPLE
tristate "Apple PCIe controller"
depends on ARCH_APPLE || COMPILE_TEST
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c
index 8f413509e37d..3646638f3df0 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -120,8 +120,10 @@
* The doorbell address is set to 0xfffff000, which by convention
* matches what MacOS does, and it is possible to use any other
* address (in the bottom 4GB, as the base register is only 32bit).
+ * However, it has to be excluded from the IOVA range, and the DART
+ * driver has to know about it.
*/
-#define DOORBELL_ADDR 0xfffff000
+#define DOORBELL_ADDR CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR
struct apple_pcie {
struct mutex lock;