diff options
| author |   Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2017-10-23 11:43:40 -0700 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2017-10-23 11:43:40 -0700 |
| commit | 91de76e661a266731fc2889a398ad1694df9d523 (patch) | |
| tree | ecc278f000f18e5b2b880f61ee4b0e68ebd1d6d4 /drivers/pci/dwc/pcie-designware.c | |
| parent | Input: edt-ft5x06 - implement support for the EDT-M12 series (diff) | |
| parent | Linux 4.14-rc6 (diff) | |
| download | linux-dev-91de76e661a266731fc2889a398ad1694df9d523.tar.xz linux-dev-91de76e661a266731fc2889a398ad1694df9d523.zip | |
Merge tag 'v4.14-rc6' into next
Merge with mainline to bring in the timer API changes.
Diffstat (limited to 'drivers/pci/dwc/pcie-designware.c')
| -rw-r--r-- | drivers/pci/dwc/pcie-designware.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/pci/dwc/pcie-designware.c b/drivers/pci/dwc/pcie-designware.c index 0e03af279259..88abdddee2ad 100644 --- a/drivers/pci/dwc/pcie-designware.c +++ b/drivers/pci/dwc/pcie-designware.c @@ -1,5 +1,5 @@ /* - * Synopsys Designware PCIe host controller driver + * Synopsys DesignWare PCIe host controller driver * * Copyright (C) 2013 Samsung Electronics Co., Ltd. * http://www.samsung.com @@ -107,8 +107,9 @@ static void dw_pcie_writel_ob_unroll(struct dw_pcie *pci, u32 index, u32 reg, dw_pcie_writel_dbi(pci, offset + reg, val); } -void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index, int type, - u64 cpu_addr, u64 pci_addr, u32 size) +static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index, + int type, u64 cpu_addr, + u64 pci_addr, u32 size) { u32 retries, val; @@ -177,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, */ for (retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++) { val = dw_pcie_readl_dbi(pci, PCIE_ATU_CR2); - if (val == PCIE_ATU_ENABLE) + if (val & PCIE_ATU_ENABLE) return; usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX); @@ -200,8 +201,9 @@ static void dw_pcie_writel_ib_unroll(struct dw_pcie *pci, u32 index, u32 reg, dw_pcie_writel_dbi(pci, offset + reg, val); } -int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index, int bar, - u64 cpu_addr, enum dw_pcie_as_type as_type) +static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index, + int bar, u64 cpu_addr, + enum dw_pcie_as_type as_type) { int type; u32 retries, val; |