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authorKeith Busch <keith.busch@intel.com>2018-01-24 17:03:18 -0600
committerBjorn Helgaas <helgaas@kernel.org>2018-01-26 16:49:40 -0600
commiteed85ff4c0da72640dcf7c0737c5a08bca2958e7 (patch)
treeea6c3e9286e0d3bf2d36f6fa7eac37bde287c9d6 /drivers/pci/pcie/portdrv_core.c
parentPCI/DPC: Fix shared interrupt handling (diff)
downloadlinux-dev-eed85ff4c0da72640dcf7c0737c5a08bca2958e7.tar.xz
linux-dev-eed85ff4c0da72640dcf7c0737c5a08bca2958e7.zip
PCI/DPC: Enable DPC only if AER is available
The "Determination of DPC Control" implementation note in PCIe r4.0, sec 6.1.10, recommends the operating system always link DPC control to the control of AER, as the two functionalities are strongly connected. To avoid conflicts over whether platform firmware or the OS controls DPC, enable DPC only if AER is enabled in the OS, and the device's error handling does not have firmware-first AER handling. Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
Diffstat (limited to 'drivers/pci/pcie/portdrv_core.c')
-rw-r--r--drivers/pci/pcie/portdrv_core.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index a59210350c44..ef3bad4ad010 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -216,9 +216,9 @@ static int get_port_device_capability(struct pci_dev *dev)
return 0;
cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
- | PCIE_PORT_SERVICE_VC | PCIE_PORT_SERVICE_DPC;
+ | PCIE_PORT_SERVICE_VC;
if (pci_aer_available())
- cap_mask |= PCIE_PORT_SERVICE_AER;
+ cap_mask |= PCIE_PORT_SERVICE_AER | PCIE_PORT_SERVICE_DPC;
if (pcie_ports_auto)
pcie_port_platform_notify(dev, &cap_mask);