diff options
| author |   Swapnil Jakhade <sjakhade@cadence.com> | 2021-12-23 07:01:28 +0100 |
|---|---|---|
| committer |   Vinod Koul <vkoul@kernel.org> | 2021-12-27 16:35:08 +0530 |
| commit | 8c95e1722689f1b1e63a6206acba2b6200ed7864 (patch) | |
| tree | c05f597510d1aa22701b69bc650504f030ce701d /drivers/phy/cadence | |
| parent | phy: cadence: Sierra: Add support to get SSC type from device tree (diff) | |
| download | linux-dev-8c95e1722689f1b1e63a6206acba2b6200ed7864.tar.xz linux-dev-8c95e1722689f1b1e63a6206acba2b6200ed7864.zip | |
phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation
No functional change. Rename some regmap variables as mentioned in Sierra
register description documentation.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-7-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy/cadence')
| -rw-r--r-- | drivers/phy/cadence/phy-cadence-sierra.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 4674328574f5..9f2b8aefee9c 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -145,8 +145,9 @@ #define SIERRA_DEQ_TAU_CTRL1_FAST_MAINT_PREG 0x14F #define SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG 0x150 -#define SIERRA_PHY_CONFIG_CTRL_OFFSET(block_offset) \ - (0xc000 << (block_offset)) +/* PHY PCS common registers */ +#define SIERRA_PHY_PCS_COMMON_OFFSET(block_offset) \ + (0xc000 << (block_offset)) #define SIERRA_PHY_PLL_CFG 0xe #define SIERRA_MACRO_ID 0x00007364 @@ -275,7 +276,7 @@ struct cdns_sierra_phy { struct reset_control *phy_rst; struct reset_control *apb_rst; struct regmap *regmap_lane_cdb[SIERRA_MAX_LANES]; - struct regmap *regmap_phy_config_ctrl; + struct regmap *regmap_phy_pcs_common_cdb; struct regmap *regmap_common_cdb; struct regmap_field *macro_id_type; struct regmap_field *phy_pll_cfg_1; @@ -346,8 +347,8 @@ static const struct regmap_config cdns_sierra_common_cdb_config = { .reg_read = cdns_regmap_read, }; -static const struct regmap_config cdns_sierra_phy_config_ctrl_config = { - .name = "sierra_phy_config_ctrl", +static const struct regmap_config cdns_sierra_phy_pcs_cmn_cdb_config = { + .name = "sierra_phy_pcs_cmn_cdb", .reg_stride = 1, .fast_io = true, .reg_write = cdns_regmap_write, @@ -689,7 +690,7 @@ static int cdns_regfield_init(struct cdns_sierra_phy *sp) sp->cmn_refrcv_refclk_termen_preg[i] = field; } - regmap = sp->regmap_phy_config_ctrl; + regmap = sp->regmap_phy_pcs_common_cdb; field = devm_regmap_field_alloc(dev, regmap, phy_pll_cfg_1); if (IS_ERR(field)) { dev_err(dev, "PHY_PLL_CFG_1 reg field init failed\n"); @@ -741,14 +742,14 @@ static int cdns_regmap_init_blocks(struct cdns_sierra_phy *sp, } sp->regmap_common_cdb = regmap; - block_offset = SIERRA_PHY_CONFIG_CTRL_OFFSET(block_offset_shift); + block_offset = SIERRA_PHY_PCS_COMMON_OFFSET(block_offset_shift); regmap = cdns_regmap_init(dev, base, block_offset, reg_offset_shift, - &cdns_sierra_phy_config_ctrl_config); + &cdns_sierra_phy_pcs_cmn_cdb_config); if (IS_ERR(regmap)) { - dev_err(dev, "Failed to init PHY config and control regmap\n"); + dev_err(dev, "Failed to init PHY PCS common CDB regmap\n"); return PTR_ERR(regmap); } - sp->regmap_phy_config_ctrl = regmap; + sp->regmap_phy_pcs_common_cdb = regmap; return 0; } |