diff options
| author |   Aurelien Jarno <aurelien@aurel32.net> | 2022-09-27 07:17:52 +0200 |
|---|---|---|
| committer |   Vinod Koul <vkoul@kernel.org> | 2022-09-29 11:43:04 +0530 |
| commit | 37d40a21473fdf1d0194089eb259b8ceeec2a4b9 (patch) | |
| tree | 0aa45b01892bddd91fcb43a0f50b706ca22b1593 /drivers/phy/rockchip | |
| parent | phy: tegra: xusb: Enable usb role switch attribute (diff) | |
| download | linux-dev-37d40a21473fdf1d0194089eb259b8ceeec2a4b9.tar.xz linux-dev-37d40a21473fdf1d0194089eb259b8ceeec2a4b9.zip | |
phy: rockchip-snps-pcie3: only look for rockchip,pipe-grf on rk3588
The rockchip,pipe-grf property is only used on rk3588, but not on
rk3568. Therefore this property is not present on rk3568 devices,
leading to the following message:
rockchip-snps-pcie3-phy fe8c0000.phy: failed to find rockchip,pipe_grf regmap
Fix that by only looking for this property on rk3588.
Fixes: 2e9bffc4f713d ("phy: rockchip: Support PCIe v3")
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Link: https://lore.kernel.org/r/20220927051752.53089-1-aurelien@aurel32.net
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy/rockchip')
| -rw-r--r-- | drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c index a8d5914c5ac5..1d355b32ba55 100644 --- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c +++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c @@ -255,10 +255,15 @@ static int rockchip_p3phy_probe(struct platform_device *pdev) return PTR_ERR(priv->phy_grf); } - priv->pipe_grf = syscon_regmap_lookup_by_phandle(dev->of_node, - "rockchip,pipe-grf"); - if (IS_ERR(priv->pipe_grf)) - dev_info(dev, "failed to find rockchip,pipe_grf regmap\n"); + if (of_device_is_compatible(np, "rockchip,rk3588-pcie3-phy")) { + priv->pipe_grf = + syscon_regmap_lookup_by_phandle(dev->of_node, + "rockchip,pipe-grf"); + if (IS_ERR(priv->pipe_grf)) + dev_info(dev, "failed to find rockchip,pipe_grf regmap\n"); + } else { + priv->pipe_grf = NULL; + } priv->num_lanes = of_property_read_variable_u32_array(dev->of_node, "data-lanes", priv->lanes, 2, |