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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-04-25 10:49:34 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-04-25 10:49:34 +0200
commitd30e413fa482a0e83f958f488bfee31ad3431689 (patch)
tree0af9b6dde4483835ab9d67e9a4f9a15f87a8266d /drivers/phy/tegra/xusb.h
parentusb: mtu3: get optional clock by devm_clk_get_optional() (diff)
parentdt-bindings: phy-qcom-qmp: Tweak qcom,msm8998-qmp-ufs-phy (diff)
downloadlinux-dev-d30e413fa482a0e83f958f488bfee31ad3431689.tar.xz
linux-dev-d30e413fa482a0e83f958f488bfee31ad3431689.zip
Merge tag 'phy-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next
Kishon writes: phy: for 5.2 *) Add a new *release* phy_ops invoked when the consumer relinquishes PHY that can be used to undo the operation performed in xlate *) Add new driver to support USB2 PHY and shared USB3 + PCIE PHY in Amlogic G12A SoC Family. *) Add new driver to support for Broadcom's Stingray USB PHY (Type 1 has one super speed PHY and one high speed PHY, Type 2 has one high speed PHY) *) Add new driver to support USB PHY in hi3660 SoC of Hisilicon *) Add new driver to support UFS M-PHY in MediaTek SoC *) Add new driver to support XUSB pad controller in Tegra186 SoCs *) Add new driver to support SERDES in TI's AM654 platform *) Add support for generation 2 USB2 PHY and gneration 3 USB2 PHY in r8a77470 to phy-rcar-gen2.c and phy-rcar-gen3-usb2.c respectively *) Add support for PCIe QMP PHY support in msm8998 to phy-qcom-qmp.c *) Add support for SERDES6G in phy-ocelot-serdes.c *) Add support to set drive impedance from device tree in phy-rockchip-emmc.c *) Add support to power up/down the VBUS voltage rail in phy-fsl-imx8mq-usb.c *) Add support to shut off regulators that power UFS during system suspend *) Re-design phy-rcar-gen3-usb2.c to create separate PHY instances for each channel which helps to enable/disable interrupts for each instance independently *) Fix PCIe power up sequence to follow the TRM in order to ensure the DPLL & PHY operates correctly over the entire temperature range. *) Use devm_clk_get_optional to get optional clocks instead of adding custom error checks Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> * tag 'phy-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (51 commits) dt-bindings: phy-qcom-qmp: Tweak qcom,msm8998-qmp-ufs-phy dt-bindings: phy-qcom-qmp: Add qcom,msm8998-qmp-pcie-phy phy: Add usb phy support for hi3660 Soc of Hisilicon dt-bindings: phy: Add support for HiSilicon's hi3660 USB PHY scsi: phy: mediatek: fix typo in author's email address phy: ocelot-serdes: Add support for SERDES6G muxing phy: fsl-imx8mq-usb: add support for VBUS power control dt-bindings: phy-imx8mq-usb: add optional vbus supply regulator phy: qcom-qmp: Add msm8998 PCIe QMP PHY support phy: ti: am654-serdes: Support all clksel values phy: ti: Add a new SERDES driver for TI's AM654x SoC dt-bindings: phy: ti: Add dt binding documentation for SERDES in AM654x SoC phy: core: Invoke pm_runtime_get_*/pm_runtime_put_* before invoking reset callback phy: core: Add *release* phy_ops invoked when the consumer relinquishes PHY phy: phy-meson-gxl-usb2: get optional clock by devm_clk_get_optional() phy: socionext: get optional clock by devm_clk_get_optional() phy: qcom-qusb2: get optional clock by devm_clk_get_optional() phy: phy-mtk-tphy: get optional clock by devm_clk_get_optional() phy: renesas: rcar-gen3-usb2: enable/disable independent irqs phy: renesas: rcar-gen3-usb2: Use pdev's device pointer on dev_vdbg() ...
Diffstat (limited to 'drivers/phy/tegra/xusb.h')
-rw-r--r--drivers/phy/tegra/xusb.h35
1 files changed, 35 insertions, 0 deletions
diff --git a/drivers/phy/tegra/xusb.h b/drivers/phy/tegra/xusb.h
index b49dbc36efa3..e0028b9fe702 100644
--- a/drivers/phy/tegra/xusb.h
+++ b/drivers/phy/tegra/xusb.h
@@ -19,6 +19,8 @@
#include <linux/mutex.h>
#include <linux/workqueue.h>
+#include <linux/usb/otg.h>
+
/* legacy entry points for backwards-compatibility */
int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev);
int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev);
@@ -54,10 +56,21 @@ struct tegra_xusb_lane {
int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
struct device_node *np);
+struct tegra_xusb_usb3_lane {
+ struct tegra_xusb_lane base;
+};
+
+static inline struct tegra_xusb_usb3_lane *
+to_usb3_lane(struct tegra_xusb_lane *lane)
+{
+ return container_of(lane, struct tegra_xusb_usb3_lane, base);
+}
+
struct tegra_xusb_usb2_lane {
struct tegra_xusb_lane base;
u32 hs_curr_level_offset;
+ bool powered_on;
};
static inline struct tegra_xusb_usb2_lane *
@@ -168,6 +181,19 @@ int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,
const struct phy_ops *ops);
void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad);
+struct tegra_xusb_usb3_pad {
+ struct tegra_xusb_pad base;
+
+ unsigned int enable;
+ struct mutex lock;
+};
+
+static inline struct tegra_xusb_usb3_pad *
+to_usb3_pad(struct tegra_xusb_pad *pad)
+{
+ return container_of(pad, struct tegra_xusb_usb3_pad, base);
+}
+
struct tegra_xusb_usb2_pad {
struct tegra_xusb_pad base;
@@ -271,6 +297,7 @@ struct tegra_xusb_usb2_port {
struct tegra_xusb_port base;
struct regulator *supply;
+ enum usb_dr_mode mode;
bool internal;
};
@@ -367,6 +394,9 @@ struct tegra_xusb_padctl_soc {
} ports;
const struct tegra_xusb_padctl_ops *ops;
+
+ const char * const *supply_names;
+ unsigned int num_supplies;
};
struct tegra_xusb_padctl {
@@ -390,6 +420,8 @@ struct tegra_xusb_padctl {
unsigned int enable;
struct clk *clk;
+
+ struct regulator_bulk_data *supplies;
};
static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,
@@ -417,5 +449,8 @@ extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc;
#if defined(CONFIG_ARCH_TEGRA_210_SOC)
extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc;
#endif
+#if defined(CONFIG_ARCH_TEGRA_186_SOC)
+extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc;
+#endif
#endif /* __PHY_TEGRA_XUSB_H */