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| author |   Chunfeng Yun <chunfeng.yun@mediatek.com> | 2021-05-17 13:37:21 +0800 |
|---|---|---|
| committer |   Vinod Koul <vkoul@kernel.org> | 2021-05-31 14:08:58 +0530 |
| commit | 4bbe33f66d7da985ab985d5092328cb3061b7a97 (patch) | |
| tree | b78afbf6035f4779309c7fd191ef253e82c322e1 /drivers/phy | |
| parent | phy: phy-xgene.c: Fix alignment of comment (diff) | |
| download | linux-dev-4bbe33f66d7da985ab985d5092328cb3061b7a97.tar.xz linux-dev-4bbe33f66d7da985ab985d5092328cb3061b7a97.zip | |
phy: qcom-qmp: remove redundant error of clock bulk
There is error log in clk_bulk_prepare/enable()
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1621229841-22984-1-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy')
| -rw-r--r-- | drivers/phy/qualcomm/phy-qcom-qmp.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 65ab72ddf1ee..cfe359488f5c 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -4292,10 +4292,8 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy) } ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks); - if (ret) { - dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret); + if (ret) goto err_rst; - } if (cfg->has_phy_dp_com_ctrl) { qphy_setbits(dp_com, QPHY_V3_DP_COM_POWER_DOWN_CTRL, @@ -4729,10 +4727,8 @@ static int __maybe_unused qcom_qmp_phy_runtime_resume(struct device *dev) } ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks); - if (ret) { - dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret); + if (ret) return ret; - } ret = clk_prepare_enable(qphy->pipe_clk); if (ret) { |