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| author |   Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-04-18 01:05:50 +0200 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2013-06-04 21:04:33 +0900 |
| commit | 75c57d2c908c4b1c57139db2f817483dc7052a5e (patch) | |
| tree | 5b60b1553621f2156fd9eaf5d49f674029a7e7e1 /drivers/pinctrl/sh-pfc/pfc-r8a7740.c | |
| parent | sh-pfc: r8a7740: Remove GETHER function GPIOS (diff) | |
| download | linux-dev-75c57d2c908c4b1c57139db2f817483dc7052a5e.tar.xz linux-dev-75c57d2c908c4b1c57139db2f817483dc7052a5e.zip | |
sh-pfc: r8a7740: Remove CEU function GPIOS
All r8a7740 platforms now use the pinctrl API to control the CEU pins,
the corresponding function GPIOS are unused. Remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7740.c')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 28 |
1 files changed, 0 insertions, 28 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c index 58fbe6b1bae0..7ab4ff2bffb4 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c @@ -3232,34 +3232,6 @@ static const struct pinmux_func pinmux_func_gpios[] = { GPIO_FN(RSPI_SSL3_A), GPIO_FN(RSPI_CK_A), GPIO_FN(RSPI_MOSI_A), GPIO_FN(RSPI_MISO_A), - /* VIO CKO */ - GPIO_FN(VIO_CKO1), - GPIO_FN(VIO_CKO2), - GPIO_FN(VIO_CKO_1), - GPIO_FN(VIO_CKO), - - /* VIO0 */ - GPIO_FN(VIO0_D0), GPIO_FN(VIO0_D1), GPIO_FN(VIO0_D2), - GPIO_FN(VIO0_D3), GPIO_FN(VIO0_D4), GPIO_FN(VIO0_D5), - GPIO_FN(VIO0_D6), GPIO_FN(VIO0_D7), GPIO_FN(VIO0_D8), - GPIO_FN(VIO0_D9), GPIO_FN(VIO0_D10), GPIO_FN(VIO0_D11), - GPIO_FN(VIO0_D12), GPIO_FN(VIO0_VD), GPIO_FN(VIO0_HD), - GPIO_FN(VIO0_CLK), GPIO_FN(VIO0_FIELD), - - GPIO_FN(VIO0_D13_PORT26), /* MSEL5CR_27_0 */ - GPIO_FN(VIO0_D14_PORT25), - GPIO_FN(VIO0_D15_PORT24), - - GPIO_FN(VIO0_D13_PORT22), /* MSEL5CR_27_1 */ - GPIO_FN(VIO0_D14_PORT95), - GPIO_FN(VIO0_D15_PORT96), - - /* VIO1 */ - GPIO_FN(VIO1_D0), GPIO_FN(VIO1_D1), GPIO_FN(VIO1_D2), - GPIO_FN(VIO1_D3), GPIO_FN(VIO1_D4), GPIO_FN(VIO1_D5), - GPIO_FN(VIO1_D6), GPIO_FN(VIO1_D7), GPIO_FN(VIO1_VD), - GPIO_FN(VIO1_HD), GPIO_FN(VIO1_CLK), GPIO_FN(VIO1_FIELD), - /* TPU0 */ GPIO_FN(TPU0TO0), GPIO_FN(TPU0TO1), GPIO_FN(TPU0TO3), GPIO_FN(TPU0TO2_PORT66), /* TPU0TO2 Port 66/202 */ |