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author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-02-23 23:39:55 +0100 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-03-18 16:56:50 +0100 |
commit | d92ee9cf8ec8d7fe1d7dbc4b3ee459419b1e5533 (patch) | |
tree | ad4845a5740de9f5419f41bd2bf4c5813dd8aafa /drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | |
parent | pinctrl: sh-pfc: r8a77990: Move CANFD pin groups and functions (diff) | |
download | linux-dev-d92ee9cf8ec8d7fe1d7dbc4b3ee459419b1e5533.tar.xz linux-dev-d92ee9cf8ec8d7fe1d7dbc4b3ee459419b1e5533.zip |
pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across suspend/resume
The TDSELCTRL register is responsible for configuring the SDHI/MMC clock
return path delay and may be adjusted by the bootloader. Retain the value
across suspend/resume to prevent hardware instability after resume.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c')
-rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c index 287cfbb7e992..0ef7ada08316 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c @@ -5547,10 +5547,12 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { enum ioctrl_regs { POCCTRL, + TDSELCTRL, }; static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { [POCCTRL] = { 0xe6060380, }, + [TDSELCTRL] = { 0xe60603c0, }, { /* sentinel */ }, }; |