diff options
| author |   Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2016-06-30 00:21:08 +0300 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2016-08-08 12:33:38 +0200 |
| commit | 2cf59e0c200de79cd2a8f87ba06c87fa24060e2d (patch) | |
| tree | 9daba3890a28d01046b3e73bc61c4af3ab9278d1 /drivers/pinctrl/sh-pfc/sh_pfc.h | |
| parent | pinctrl: sh-pfc: Fix overly long lines (diff) | |
| download | linux-dev-2cf59e0c200de79cd2a8f87ba06c87fa24060e2d.tar.xz linux-dev-2cf59e0c200de79cd2a8f87ba06c87fa24060e2d.zip | |
pinctrl: sh-pfc: Add R8A7792 PFC support
Add the PFC support for the R8A7792 SoC including pin groups for some
on-chip devices such as SCIF, INTC, and LBSC...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[geert: s/LSBC/LBSC/]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/sh_pfc.h')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/sh_pfc.h | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h index 11f18be532b8..ed12886d5bd5 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -257,6 +257,7 @@ extern const struct sh_pfc_soc_info r8a7778_pinmux_info; extern const struct sh_pfc_soc_info r8a7779_pinmux_info; extern const struct sh_pfc_soc_info r8a7790_pinmux_info; extern const struct sh_pfc_soc_info r8a7791_pinmux_info; +extern const struct sh_pfc_soc_info r8a7792_pinmux_info; extern const struct sh_pfc_soc_info r8a7793_pinmux_info; extern const struct sh_pfc_soc_info r8a7794_pinmux_info; extern const struct sh_pfc_soc_info r8a7795_pinmux_info; @@ -401,19 +402,27 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; PORT_GP_CFG_1(bank, 15, fn, sfx, cfg) #define PORT_GP_16(bank, fn, sfx) PORT_GP_CFG_16(bank, fn, sfx, 0) -#define PORT_GP_CFG_18(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_17(bank, fn, sfx, cfg) \ PORT_GP_CFG_16(bank, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 16, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 16, fn, sfx, cfg) +#define PORT_GP_17(bank, fn, sfx) PORT_GP_CFG_17(bank, fn, sfx, 0) + +#define PORT_GP_CFG_18(bank, fn, sfx, cfg) \ + PORT_GP_CFG_17(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 17, fn, sfx, cfg) #define PORT_GP_18(bank, fn, sfx) PORT_GP_CFG_18(bank, fn, sfx, 0) -#define PORT_GP_CFG_26(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_23(bank, fn, sfx, cfg) \ PORT_GP_CFG_18(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 18, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 19, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 20, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 21, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 22, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 22, fn, sfx, cfg) +#define PORT_GP_23(bank, fn, sfx) PORT_GP_CFG_23(bank, fn, sfx, 0) + +#define PORT_GP_CFG_26(bank, fn, sfx, cfg) \ + PORT_GP_CFG_23(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 23, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 24, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 25, fn, sfx, cfg) @@ -425,9 +434,13 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; PORT_GP_CFG_1(bank, 27, fn, sfx, cfg) #define PORT_GP_28(bank, fn, sfx) PORT_GP_CFG_28(bank, fn, sfx, 0) -#define PORT_GP_CFG_30(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_29(bank, fn, sfx, cfg) \ PORT_GP_CFG_28(bank, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 28, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 28, fn, sfx, cfg) +#define PORT_GP_29(bank, fn, sfx) PORT_GP_CFG_29(bank, fn, sfx, 0) + +#define PORT_GP_CFG_30(bank, fn, sfx, cfg) \ + PORT_GP_CFG_29(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 29, fn, sfx, cfg) #define PORT_GP_30(bank, fn, sfx) PORT_GP_CFG_30(bank, fn, sfx, 0) |