diff options
| author |   Thierry Reding <treding@nvidia.com> | 2019-06-21 17:19:32 +0200 |
|---|---|---|
| committer |   Linus Walleij <linus.walleij@linaro.org> | 2019-06-25 15:35:58 +0200 |
| commit | cf75b8f2cd8f1f9beb64c2fa2eb93a7c265b59c1 (patch) | |
| tree | 51b11e4427e8b18a0b826a9f339286710f923e2f /drivers/pinctrl/tegra/pinctrl-tegra20.c | |
| parent | pinctrl: tegra: Set specific GPIO compatible string (diff) | |
| download | linux-dev-cf75b8f2cd8f1f9beb64c2fa2eb93a7c265b59c1.tar.xz linux-dev-cf75b8f2cd8f1f9beb64c2fa2eb93a7c265b59c1.zip | |
pinctrl: tegra: Add bitmask support for parked bits
Some pin groups have park bits for multiple pins in one register.
Support this by turning the parked bit field into a parked bitmask
field. If no parked bits are supported, the bitmask can be 0.
Update the pingroup table on Tegra210, which is the only generation
where this is supported, with the parked bitmask.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/tegra/pinctrl-tegra20.c')
| -rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra20.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra20.c b/drivers/pinctrl/tegra/pinctrl-tegra20.c index 1fc82a9576e0..9a8df1e43179 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra20.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra20.c @@ -1997,13 +1997,13 @@ static struct tegra_function tegra20_functions[] = { .tri_reg = ((tri_r) - TRISTATE_REG_A), \ .tri_bank = 0, \ .tri_bit = tri_b, \ - .parked_bit = -1, \ .einput_bit = -1, \ .odrain_bit = -1, \ .lock_bit = -1, \ .ioreset_bit = -1, \ .rcv_sel_bit = -1, \ .drv_reg = -1, \ + .parked_bitmask = 0, \ } /* Pin groups with only pull up and pull down control */ @@ -2017,7 +2017,7 @@ static struct tegra_function tegra20_functions[] = { .pupd_bank = 2, \ .pupd_bit = pupd_b, \ .drv_reg = -1, \ - .parked_bit = -1, \ + .parked_bitmask = 0, \ } /* Pin groups for drive strength registers (configurable version) */ @@ -2033,7 +2033,7 @@ static struct tegra_function tegra20_functions[] = { .tri_reg = -1, \ .drv_reg = ((r) - PINGROUP_REG_A), \ .drv_bank = 3, \ - .parked_bit = -1, \ + .parked_bitmask = 0, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ .lpmd_bit = lpmd_b, \ |