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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-03-16 02:38:14 +0900
committerLinus Walleij <linus.walleij@linaro.org>2017-03-23 10:09:43 +0100
commit8ef364b3cee9d89a13549652d646bc5e61440d86 (patch)
tree14a5a2e9cddd6e9025615488b32a6ef30578431c /drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
parentpinctrl: meson: gxl: add the missing PWM pin definitions (diff)
downloadlinux-dev-8ef364b3cee9d89a13549652d646bc5e61440d86.tar.xz
linux-dev-8ef364b3cee9d89a13549652d646bc5e61440d86.zip
pinctrl: uniphier: remove obsoleted compatibles
Since commit 3e030b0b4e46 ("pinctrl: uniphier: allow to have pinctrl node under syscon node"), this driver has kept compatibility for the old DT files. Several releases have passed since then, so remove the obsoleted compatibles and clean up the code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/uniphier/pinctrl-uniphier-core.c')
-rw-r--r--drivers/pinctrl/uniphier/pinctrl-uniphier-core.c48
1 files changed, 21 insertions, 27 deletions
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index 546f23c9040c..30dec0ee7f35 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2015-2017 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,11 +27,18 @@
#include "../pinctrl-utils.h"
#include "pinctrl-uniphier.h"
+#define UNIPHIER_PINCTRL_PINMUX_BASE 0x1000
+#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x1700
+#define UNIPHIER_PINCTRL_DRVCTRL_BASE 0x1800
+#define UNIPHIER_PINCTRL_DRV2CTRL_BASE 0x1900
+#define UNIPHIER_PINCTRL_DRV3CTRL_BASE 0x1980
+#define UNIPHIER_PINCTRL_PUPDCTRL_BASE 0x1a00
+#define UNIPHIER_PINCTRL_IECTRL 0x1d00
+
struct uniphier_pinctrl_priv {
struct pinctrl_desc pctldesc;
struct pinctrl_dev *pctldev;
struct regmap *regmap;
- unsigned int regbase;
struct uniphier_pinctrl_socdata *socdata;
};
@@ -171,7 +179,7 @@ static int uniphier_conf_pin_bias_get(struct pinctrl_dev *pctldev,
reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pupdctrl / 32 * 4;
shift = pupdctrl % 32;
- ret = regmap_read(priv->regmap, priv->regbase + reg, &val);
+ ret = regmap_read(priv->regmap, reg, &val);
if (ret)
return ret;
@@ -231,7 +239,7 @@ static int uniphier_conf_pin_drive_get(struct pinctrl_dev *pctldev,
shift = drvctrl % 32;
mask = (1U << width) - 1;
- ret = regmap_read(priv->regmap, priv->regbase + reg, &val);
+ ret = regmap_read(priv->regmap, reg, &val);
if (ret)
return ret;
@@ -252,8 +260,7 @@ static int uniphier_conf_pin_input_enable_get(struct pinctrl_dev *pctldev,
/* This pin is always input-enabled. */
return 0;
- ret = regmap_read(priv->regmap,
- priv->regbase + UNIPHIER_PINCTRL_IECTRL, &val);
+ ret = regmap_read(priv->regmap, UNIPHIER_PINCTRL_IECTRL, &val);
if (ret)
return ret;
@@ -366,8 +373,7 @@ static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev,
reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pupdctrl / 32 * 4;
shift = pupdctrl % 32;
- return regmap_update_bits(priv->regmap, priv->regbase + reg,
- 1 << shift, val << shift);
+ return regmap_update_bits(priv->regmap, reg, 1 << shift, val << shift);
}
static int uniphier_conf_pin_drive_set(struct pinctrl_dev *pctldev,
@@ -427,7 +433,7 @@ static int uniphier_conf_pin_drive_set(struct pinctrl_dev *pctldev,
shift = drvctrl % 32;
mask = (1U << width) - 1;
- return regmap_update_bits(priv->regmap, priv->regbase + reg,
+ return regmap_update_bits(priv->regmap, reg,
mask << shift, val << shift);
}
@@ -451,7 +457,7 @@ static int uniphier_conf_pin_input_enable(struct pinctrl_dev *pctldev,
if (iectrl == UNIPHIER_PIN_IECTRL_NONE)
return enable ? 0 : -EINVAL;
- reg = priv->regbase + UNIPHIER_PINCTRL_IECTRL + iectrl / 32 * 4;
+ reg = UNIPHIER_PINCTRL_IECTRL + iectrl / 32 * 4;
mask = BIT(iectrl % 32);
return regmap_update_bits(priv->regmap, reg, mask, enable ? mask : 0);
@@ -601,7 +607,7 @@ static int uniphier_pmx_set_one_mux(struct pinctrl_dev *pctldev, unsigned pin,
* stored in the offset+4.
*/
for (; reg < reg_end; reg += 4) {
- ret = regmap_update_bits(priv->regmap, priv->regbase + reg,
+ ret = regmap_update_bits(priv->regmap, reg,
mask << shift, muxval << shift);
if (ret)
return ret;
@@ -610,8 +616,7 @@ static int uniphier_pmx_set_one_mux(struct pinctrl_dev *pctldev, unsigned pin,
if (load_pinctrl) {
ret = regmap_write(priv->regmap,
- priv->regbase + UNIPHIER_PINCTRL_LOAD_PINMUX,
- 1);
+ UNIPHIER_PINCTRL_LOAD_PINMUX, 1);
if (ret)
return ret;
}
@@ -698,20 +703,9 @@ int uniphier_pinctrl_probe(struct platform_device *pdev,
if (!priv)
return -ENOMEM;
- if (of_device_is_compatible(dev->of_node, "socionext,ph1-ld4-pinctrl") ||
- of_device_is_compatible(dev->of_node, "socionext,ph1-pro4-pinctrl") ||
- of_device_is_compatible(dev->of_node, "socionext,ph1-sld8-pinctrl") ||
- of_device_is_compatible(dev->of_node, "socionext,ph1-pro5-pinctrl") ||
- of_device_is_compatible(dev->of_node, "socionext,proxstream2-pinctrl") ||
- of_device_is_compatible(dev->of_node, "socionext,ph1-ld6b-pinctrl")) {
- /* old binding */
- priv->regmap = syscon_node_to_regmap(dev->of_node);
- } else {
- priv->regbase = 0x1000;
- parent = of_get_parent(dev->of_node);
- priv->regmap = syscon_node_to_regmap(parent);
- of_node_put(parent);
- }
+ parent = of_get_parent(dev->of_node);
+ priv->regmap = syscon_node_to_regmap(parent);
+ of_node_put(parent);
if (IS_ERR(priv->regmap)) {
dev_err(dev, "failed to get regmap\n");