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| author |   Andre Przywara <andre.przywara@arm.com> | 2017-11-25 12:02:00 +0000 |
|---|---|---|
| committer |   Linus Walleij <linus.walleij@linaro.org> | 2017-11-30 16:50:43 +0100 |
| commit | 07c43a382d7de3db01cc28bf2e17ed151cde2046 (patch) | |
| tree | 0c58b6e1c6d7fe9948fa4b8b99b1a747f2028447 /drivers/pinctrl | |
| parent | pinctrl: sunxi: Fix A64 UART mux value (diff) | |
| download | linux-dev-07c43a382d7de3db01cc28bf2e17ed151cde2046.tar.xz linux-dev-07c43a382d7de3db01cc28bf2e17ed151cde2046.zip | |
pinctrl: sunxi: Disable strict mode for H5 driver
All of the H5 boards in the kernel reference the MMC0 CD pin twice in
their DT, so strict mode will make the MMC driver fail to load.
To keep existing DTs working, disable strict mode in the H5 driver.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Chris Obbard <obbardc@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c index 97b48336f84a..a78d7b922ef4 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c @@ -535,14 +535,16 @@ static const struct sunxi_pinctrl_desc sun50i_h5_pinctrl_data_broken = { .pins = sun50i_h5_pins, .npins = ARRAY_SIZE(sun50i_h5_pins), .irq_banks = 2, - .irq_read_needs_mux = true + .irq_read_needs_mux = true, + .disable_strict_mode = true, }; static const struct sunxi_pinctrl_desc sun50i_h5_pinctrl_data = { .pins = sun50i_h5_pins, .npins = ARRAY_SIZE(sun50i_h5_pins), .irq_banks = 3, - .irq_read_needs_mux = true + .irq_read_needs_mux = true, + .disable_strict_mode = true, }; static int sun50i_h5_pinctrl_probe(struct platform_device *pdev) |