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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2018-12-12 14:29:02 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-12-18 11:25:56 +0100 |
| commit | 67d7745bc78e16ec6b3af02bc1da6c8c868cbd89 (patch) | |
| tree | bfd72c8d1762129325c63d09daa5a11c80c1f4ea /drivers/pinctrl | |
| parent | pinctrl: sh-pfc: r8a7794: Remove bogus IPSR9 field (diff) | |
| download | linux-dev-67d7745bc78e16ec6b3af02bc1da6c8c868cbd89.tar.xz linux-dev-67d7745bc78e16ec6b3af02bc1da6c8c868cbd89.zip | |
pinctrl: sh-pfc: r8a77970: Add missing MOD_SEL0 field
The Module Select Register 0 contains 20 (= 5 x 4) reserved bits, and 12
single-bit fields, but the variable field descriptor lacks a field of 4
reserved bits.
Fixes: b92ac66a1819602b ("pinctrl: sh-pfc: Add R8A77970 PFC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a77970.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77970.c b/drivers/pinctrl/sh-pfc/pfc-r8a77970.c index 443074d39f29..4a7ab84b366b 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77970.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77970.c @@ -2421,7 +2421,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { #define F_(x, y) x, #define FM(x) FN_##x, { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32, - 4, 4, 4, 4, + 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) { /* RESERVED 31, 30, 29, 28 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |