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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2019-02-18 10:42:21 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-03-18 16:56:49 +0100 |
| commit | a8d728a0c59cd508b3cdcef8950409089156bf70 (patch) | |
| tree | 467209ee21b61b64410001245619233839b493c8 /drivers/pinctrl | |
| parent | pinctrl: sh-pfc: r8a77970: Rename IOCTRLx registers (diff) | |
| download | linux-dev-a8d728a0c59cd508b3cdcef8950409089156bf70.tar.xz linux-dev-a8d728a0c59cd508b3cdcef8950409089156bf70.zip | |
pinctrl: sh-pfc: r8a77980: Rename IOCTRLx registers
The R-Car Gen3 HardWare Manual Errata for Rev. 1.00 (Jul 2, 2018)
renamed the various miscellaneous I/O control registers (IOCTRLx) on
R-Car V3H, to reflect better their actual purposes, and matching other
SoCs.
Update the code to match this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a77980.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77980.c b/drivers/pinctrl/sh-pfc/pfc-r8a77980.c index b807b67ae143..1dcc508366b8 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77980.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77980.c @@ -2828,17 +2828,17 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { }; enum ioctrl_regs { - IOCTRL30, - IOCTRL31, - IOCTRL32, - IOCTRL33, + POCCTRL0, + POCCTRL1, + POCCTRL2, + POCCTRL3, }; static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { - [IOCTRL30] = { 0xe6060380, }, - [IOCTRL31] = { 0xe6060384, }, - [IOCTRL32] = { 0xe6060388, }, - [IOCTRL33] = { 0xe606038c, }, + [POCCTRL0] = { 0xe6060380, }, + [POCCTRL1] = { 0xe6060384, }, + [POCCTRL2] = { 0xe6060388, }, + [POCCTRL3] = { 0xe606038c, }, { /* sentinel */ }, }; @@ -2847,20 +2847,20 @@ static int r8a77980_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, { int bit = pin & 0x1f; - *pocctrl = pinmux_ioctrl_regs[IOCTRL30].reg; + *pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg; if (pin >= RCAR_GP_PIN(0, 0) && pin <= RCAR_GP_PIN(0, 21)) return bit; else if (pin >= RCAR_GP_PIN(2, 0) && pin <= RCAR_GP_PIN(2, 9)) return bit + 22; - *pocctrl = pinmux_ioctrl_regs[IOCTRL31].reg; + *pocctrl = pinmux_ioctrl_regs[POCCTRL1].reg; if (pin >= RCAR_GP_PIN(2, 10) && pin <= RCAR_GP_PIN(2, 16)) return bit - 10; if ((pin >= RCAR_GP_PIN(2, 17) && pin <= RCAR_GP_PIN(2, 24)) || (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 16))) return bit + 7; - *pocctrl = pinmux_ioctrl_regs[IOCTRL32].reg; + *pocctrl = pinmux_ioctrl_regs[POCCTRL2].reg; if (pin >= RCAR_GP_PIN(2, 25) && pin <= RCAR_GP_PIN(2, 29)) return pin - 25; |