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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2019-06-26 15:38:50 -0700
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>2019-07-02 18:41:16 +0300
commitf607874f35cbd276a837d7147d4e1ec752dfef44 (patch)
tree38f13a1c28aa88501939cb0edeacfd27ad74e259 /drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c
parentplatform/x86: ISST: Add Intel Speed Select PUNIT MSR interface (diff)
downloadlinux-dev-f607874f35cbd276a837d7147d4e1ec752dfef44.tar.xz
linux-dev-f607874f35cbd276a837d7147d4e1ec752dfef44.zip
platform/x86: ISST: Restore state on resume
Commands which causes PUNIT writes, store them and restore them on system resume. The driver stores all such requests in a hash table and stores the the latest mailbox request parameters. On resume these commands mail box commands are executed again. There are only 5 such mail box commands which will trigger such processing so a very low overhead in store and execute on resume. Also there is no order requirement for mail box commands for these write/set commands. There is one MSR request for changing turbo ratio limits, this also stored and get restored on resume and cpu online. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c')
-rw-r--r--drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c38
1 files changed, 37 insertions, 1 deletions
diff --git a/drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c b/drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c
index d4bfc32546b5..89b042aecef3 100644
--- a/drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c
+++ b/drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c
@@ -12,6 +12,7 @@
#include <linux/pci.h>
#include <linux/sched/signal.h>
#include <linux/slab.h>
+#include <linux/suspend.h>
#include <linux/topology.h>
#include <linux/uaccess.h>
#include <uapi/linux/isst_if.h>
@@ -128,11 +129,37 @@ static long isst_if_mbox_proc_cmd(u8 *cmd_ptr, int *write_only, int resume)
if (ret)
return ret;
+ if (!action.err && !resume && isst_if_mbox_cmd_set_req(action.mbox_cmd))
+ action.err = isst_store_cmd(action.mbox_cmd->command,
+ action.mbox_cmd->sub_command,
+ action.mbox_cmd->logical_cpu, 1,
+ action.mbox_cmd->parameter,
+ action.mbox_cmd->req_data);
*write_only = 0;
return action.err;
}
+
+static int isst_pm_notify(struct notifier_block *nb,
+ unsigned long mode, void *_unused)
+{
+ switch (mode) {
+ case PM_POST_HIBERNATION:
+ case PM_POST_RESTORE:
+ case PM_POST_SUSPEND:
+ isst_resume_common();
+ break;
+ default:
+ break;
+ }
+ return 0;
+}
+
+static struct notifier_block isst_pm_nb = {
+ .notifier_call = isst_pm_notify,
+};
+
#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
static const struct x86_cpu_id isst_if_cpu_ids[] = {
@@ -166,12 +193,21 @@ static int __init isst_if_mbox_init(void)
cb.offset = offsetof(struct isst_if_mbox_cmds, mbox_cmd);
cb.cmd_callback = isst_if_mbox_proc_cmd;
cb.owner = THIS_MODULE;
- return isst_if_cdev_register(ISST_IF_DEV_MBOX, &cb);
+ ret = isst_if_cdev_register(ISST_IF_DEV_MBOX, &cb);
+ if (ret)
+ return ret;
+
+ ret = register_pm_notifier(&isst_pm_nb);
+ if (ret)
+ isst_if_cdev_unregister(ISST_IF_DEV_MBOX);
+
+ return ret;
}
module_init(isst_if_mbox_init)
static void __exit isst_if_mbox_exit(void)
{
+ unregister_pm_notifier(&isst_pm_nb);
isst_if_cdev_unregister(ISST_IF_DEV_MBOX);
}
module_exit(isst_if_mbox_exit)