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| author |   Vadim Pasternak <vadimp@nvidia.com> | 2020-11-25 12:10:56 +0200 |
|---|---|---|
| committer |   Hans de Goede <hdegoede@redhat.com> | 2020-11-26 15:26:22 +0100 |
| commit | 912b341585e302ee44fc5a2733f7bcf505e2c86f (patch) | |
| tree | 3d31c7a88f4db1022e0d23f18c88d0c59a7ce498 /drivers/platform/x86/mlx-platform.c | |
| parent | platform/x86: mlx-platform: Remove PSU EEPROM from default platform configuration (diff) | |
| download | linux-dev-912b341585e302ee44fc5a2733f7bcf505e2c86f.tar.xz linux-dev-912b341585e302ee44fc5a2733f7bcf505e2c86f.zip | |
platform/x86: mlx-platform: Remove PSU EEPROM from MSN274x platform configuration
Remove PSU EEPROM configuration for systems class equipped with
Mellanox chip Spectrum and ATOM CPU - system types MSN274x. Till now
all the systems from this class used few types of power units, all
equipped with EEPROM device with address space two bytes. Thus, all
these devices have been handled by EEPROM driver "24c02".
There is a new requirement is to support power unit replacement by "off
the shelf" device, matching electrical required parameters. Such device
can be equipped with different EEPROM type, which could be one byte
address space addressing or even could be not equipped with EEPROM.
In such case "24c02" will not work.
Fixes: ef08e14a3 ("platform/x86: mlx-platform: Add support for new msn274x system type")
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Link: https://lore.kernel.org/r/20201125101056.174708-3-vadimp@nvidia.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/platform/x86/mlx-platform.c')
| -rw-r--r-- | drivers/platform/x86/mlx-platform.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c index 623e7f737d4a..598f44558764 100644 --- a/drivers/platform/x86/mlx-platform.c +++ b/drivers/platform/x86/mlx-platform.c @@ -601,15 +601,13 @@ static struct mlxreg_core_data mlxplat_mlxcpld_msn274x_psu_items_data[] = { .label = "psu1", .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET, .mask = BIT(0), - .hpdev.brdinfo = &mlxplat_mlxcpld_psu[0], - .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR, + .hpdev.nr = MLXPLAT_CPLD_NR_NONE, }, { .label = "psu2", .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET, .mask = BIT(1), - .hpdev.brdinfo = &mlxplat_mlxcpld_psu[1], - .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR, + .hpdev.nr = MLXPLAT_CPLD_NR_NONE, }, }; |